L9374LF datasheet(62/80 Pages) STMICROELECTRONICS

62 / 80 page

Programmers guide

L9374LF

62/80

DocID025414 Rev 1

The resolution is 0.2% per LSB.

000(H) = 0% Duty Cycle

1F4(H) = 100% Duty cycle.

To achieve the full diagnostic capability do not use a duty cycle of less than 5%(or 19(H)).

5.1.7

Current / duty cycle registers (address 10 to 13)

These registers provide a numerical value that is either translated as a current regulation set

point or a duty cycle set point. This depends on the Current Control / PWM (CCPWM_Qx)

bits found in Register 14. Either or both outputs can be set as either a current controlled

output or a fixed PWM output independently (for details see Chapter 3.3.6: Q3 / Q4 (current

controller)).

Resolution of LSB: 3.522mA

000(H) = 0 Amps

1FF(H) = 1.8 Amps

Table 50. Duty cycle register (address 6 to 9)

Duty cycle register

Number of bits

Bit location

Name

Output 1 Duty cycle 1

D0 - D8

DUTY1_Q1

Output 1 Duty cycle 2

D0 - D8

DUTY2_Q1

Output 2 Duty cycle 1

D0 - D8

DUTY1_Q2

Output 2 Duty cycle 2

D0 - D8

DUTY2_Q2

MSB

LSB

1010

CURRENT/DUTY1_Q3

Parit

1011

CURRENT/DUTY2_Q3

Parit

1100

CURRENT/DUTY1_Q4

Parit

1101

CURRENT/DUTY2_Q4

Parit

free

Table 51. Current / duty cycle registers

address

Duty cycle register

Number of

bits

Bit location

Name

Output 1 Current / Duty cycle 1

D0 - D8

CURRENT/DUTY1_Q1

Output 1 Current / Duty cycle 2

D0 - D8

CURRENT/DUTY2_Q1

Output 2 Current / Duty cycle 1

D0 - D8

CURRENT/DUTY1_Q2

Output 2 Current / Duty cycle 2

D0 - D8

CURRENT/DUTY2_Q2

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