VNH7040AY datasheet(8/48 Pages) STMICROELECTRONICS

8 / 48 page

Block diagram and pin description

VNH7040AY

8/48

DocID028118 Rev 5

Table 3. Pin definitions and functions

Pin N°

Symbol

Function

1, 18, 36

Not connected.

10, 27

VCC, Heat slug1

Drain of high-side switches and power supply voltage.

INA

Clockwise input.

PWM

PWM input.

MultiSense

Output of current sense and diagnostic feedback

MultiSense_EN

Enables the MultiSense diagnostic pin

SEL0

Address the MultiSense multiplexer

SEL1

Address the MultiSense multiplexer

INB

Counter clockwise input.

28, 29, 35

Drain_LSDB,

Heat Slug3

Drain of low-side switch B.

23, 24, 25, 26

Source_HSDB

Source of high-side switch B

30, 31, 32, 33, 34

GNDB

Source of low-side switch B.

2, 8, 9

Drain_LSDA,

Heat Slug2

Drain of low-side switch A.

11, 12, 13, 14

Source_HSDA

Source of high-side switch A

3, 4, 5, 6, 7

GNDA

Source of low-side switch A.

Table 4. Pin functions description

Name

Description

VCC

Battery connection.

GND

Power ground.

Source_LSDA

Source_LSDB(1)

Power connections to the motor or the bridge configuration: Source HSDA and

Drain LSDA must be externally connected; Source HSDB and Drain LSDB must be

externally connected.

INA

INB

Voltage controlled input pins with hysteresis, CMOS compatible. These two pins

control the state of the bridge in normal operation according to the truth table

(brake to VCC, Brake to GND, clockwise and counterclockwise).

PWM

Voltage controlled input pin with hysteresis, CMOS compatible. This pin turns ON

the low-side driver according to the INA and INB settings (see Table 13). Gates of

low-side FETS get modulated by the PWM signal during their on phase allowing

speed control of the motor.

SEL0

SEL1

Active high compatible with 3 V and 5 V CMOS output pin; they addresses the

Multisense multiplexer

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