MPC8540 datasheet(270/1302 Pages) FREESCALE

Part #	MPC8540

Description	MPC8540 PowerQUICC III??Integrated Host Processor Reference Manual

PDF	1302 Pages

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Manufacturer	FREESCALE [Freescale Semiconductor, Inc]

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

6-20

Freescale Semiconductor

Core Register Summary

6.7.1.8

Exception Syndrome Register (ESR)

Table 6-10. IVOR Assignments

IVOR Number

SPR

Interrupt Type

IVOR0

400

Critical input

IVOR1

401

Machine check

IVOR2

402

Data storage

IVOR3

403

Instruction storage

IVOR4

404

External input

IVOR5

405

Alignment

IVOR6

406

Program

IVOR8

408

System call

IVOR10

410

Decrementer

IVOR11

411

Fixed-interval timer interrupt

IVOR12

412

Watchdog timer interrupt

IVOR13

413

Data TLB error

IVOR14

414

Instruction TLB error

IVOR15

415

Debug

IVOR16–IVOR31

—

Reserved for future architectural use

IVOR32

528

SPE APU unavailable (EIS defined)

IVOR33

529

Floating-point data exception (EIS defined)

IVOR34

530

Floating-point round exception (EIS defined)

IVOR35

531

Performance monitor (EIS defined)

IVOR36–IVOR63

—

Allocated for implementation-dependent use

Field

—

PIL PPR PTR — ST — DLK

ILK

—

SPE

—

Reset

All zeros

R/W

SPR

SPR 62

Figure 6-22. Exception Syndrome Register (ESR)

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