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STM32W108CB Datasheet(PDF) 106 Page - STMicroelectronics

Part # STM32W108CB
Description  High-performance, IEEE 802.15.4 wireless system-on-chip with up to 256 Kbytes of embedded Flash memory
PDF  278 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32W108CB Datasheet(HTML) 106 Page - STMicroelectronics

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Serial interfaces
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
106/278
Doc ID 16252 Rev 14
Figure 10.
Serial controller block diagram
9.2
Configuration
Before using a serial controller, it should be configured and initialized as follows:
1.
Set up the parameters specific to the operating mode (master/slave for SPI, baud rate
for UART, etc.).
2.
Configure the GPIO pins used by the serial controller as shown in Table 19 and
Table 20. Section 8.1.2: Configuration on page 89 shows how to configure GPIO
pins."If using DMA, set up the DMA and buffers. This is described fully in Section 9.12:
Serial controller: Direct memory access (DMA) registers on page 140.
3.
If using interrupts, select edge- or level-triggered interrupts with the SCx_ICR register,
enable the desired second-level interrupt sources in the SCx_IER register, and finally
enable the top-level SCx interrupt in the NVIC.
4.
Write the serial interface operating mode - SPI, I2C, or UART - to the SCx_CR register.
SC1_UARTSR
SCx_SPISR
SCx_SPICR
SCx_I2CSR
SCx_I2CCR1
SCx_I2CCR2
SCx_CRR1/SCx_CRR2
SC1_UARTBRR1/SC1_UARTBRR2
Baud Generator
Clock Generator
UART
Controller
I2C Master
Controller
SCx_DR
SPI Master
Controller
UART
SPI
I2C
OFF
SCx_CR
0
1
2
3
nRTS
nCTS
SCLK
MOSI
MISO
SDA
TXD
RXD
RX-FIFO
TX-FIFO
SCx_DMASR
SCx_DMACR
SCx_DMARXERRAR/SCx_DMARXERRBR
DMA
Controller
SCL
SCx_ISR
SCx_IER
SC1_UARTCR
SCx Interrupt
SCx TX DMA
channel
SCx RX DMA
channel
SPI Slave
Controller
nSSEL
SCx_DMARXCNTSAVEDR
SC1
only
SCx_DMATXCNTR
SCx_DMARXCNTAR/
SCx_DMARXCNTBR
SCx_DMARXBEGADDAR/
SCx_DMARXBEGADDBR/
SCx_DMATXBEGADDAR/
SCx_DMATXBEGADDBR
SCx_DMARXENDADDAR/
SCx_DMATXENDADDAR/
SCx_DMARXENDADDBR/
SCx_DMATXENDADDBR



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