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AFBR-79EQPZ-R1-C Datasheet(PDF) 8 Page - ATGBICS by Approved Technology |
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AFBR-79EQPZ-R1-C Datasheet(HTML) 8 Page - ATGBICS by Approved Technology |
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8 / 15 page ![]() ATGBICS® All rights reserved. EOE Ref: ATGBICS_AFBR-79EQPZ-R1-C_V1 Page 8 of 15 Product Datasheet Timing for Soft Control and Status Functions Parameter Symbol Max Unit Conditions Initialization Time t_init 2000 ms Time from power on1, hot plug or rising edge of Reset until the module is fully functional2 Reset Init Assert Time t_reset_init 2 μs A Reset is generated by a low level longer than the minimum reset pulse time present on the ResetL pin. Serial Bus Hardware Ready Time t_serial 2000 ms Time from power on1 until module responds to data transmission over the 2-wire serial bus Monitor Data Ready Time t_data 2000 ms Time from power on1 to data not ready, bit 0 of Byte 2, deasserted and IntL asserted Reset Assert Time t_reset 2000 ms Time from rising edge on the ResetL pin until the module is fully functional2 LPMode Assert Time ton_LPMode 100 μs Time from assertion of LPMode (Vin:LPMode =Vih) until module power consumption enters lower Power Level IntL Assert Time ton_IntL 200 ms Time from occurrence of condition triggering IntL until Vout:IntL = Vol IntL Deassert Time toff_IntL 500 μs toff_IntL 500 μs Time from clear on read3 operation of associated flag until Vout:IntL = Voh. This includes deassert times for Rx LOS, Tx Fault and other flag bits. Rx LOS Assert Time ton_los 100 ms Time from Rx LOS state to Rx LOS bit set and IntL asserted Flag Assert Time ton_flag 200 ms Time from occurrence of condition triggering flag to associated flag bit set and IntL asserted Mask Assert Time ton_mask 100 ms Time from mask bit set4 until associated IntL assertion is inhibited Mask De-assert Time toff_mask 100 ms Time from mask bit cleared4 until associated IntlL operation resumes ModSelL Assert Time ton_ModSelL 100 μs Time from assertion of ModSelL until module responds to data transmission over the 2-wire serial bus ModSelL Deassert Time toff_ModSelL 100 μs Time from deassertion of ModSelL until the module does not respond to data transmission over the 2-wire serial bus Power_over-ride or ton_Pdown 100 ms Time from P_Down bit set 4 until module power |
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