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1ST040EH2F35E2VLS1 Datasheet(PDF) 10 Page - Intel Corporation

Part # 1ST040EH2F35E2VLS1
Description  Intel® Stratix® 10 TX Device Overview
PDF  39 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

1ST040EH2F35E2VLS1 Datasheet(HTML) 10 Page - Intel Corporation

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Feature
Description
Configuration
• Dedicated Secure Device Manager
• Software programmable device configuration
• Serial and parallel flash interface
• Configuration via protocol (CvP) using PCI Express Gen1/Gen2/Gen3
• Fine-grained partial reconfiguration of core fabric
• Dynamic reconfiguration of transceivers and PLLs
• Comprehensive set of security features including AES-256, SHA-256/384, and
ECDSA-256/384 accelerators, and multi-factor authentication
• Physically Unclonable Function (PUF) service
Packaging
• Intel Embedded Multi-die Interconnect Bridge (EMIB) packaging technology
• Multiple devices with identical package footprints allows seamless migration across
different device densities
• 1.0 mm ball-pitch FBGA packaging
• Lead and lead-free package options
Software and tools
• Intel Quartus® Prime Pro Edition design suite with Hyper-Aware design flow
• Fast Forward compiler to allow HyperFlex architecture performance exploration
• Transceiver toolkit
• Platform Designer system integration tool
• DSP Builder advanced blockset
• OpenCL™ support
• SoC Embedded Design Suite (EDS)
Table 3.
Intel Stratix 10 TX HPS Features (Available in Select Devices)
SoC Subsystem
Feature
Description
Hard Processor
System
Multi-processor unit (MPU) core
• Quad-core Arm Cortex-A53 MPCore processor with Arm
CoreSight* debug and trace technology
• Scalar floating-point unit supporting single and double
precision
• Arm Neon* media processing engine for each processor
System Controllers
• System Memory Management Unit (SMMU)
• Cache Coherency Unit (CCU)
Layer 1 Cache
• 32 KB L1 instruction cache with parity
• 32 KB L1 data cache with ECC
Layer 2 Cache
• 1 MB Shared L2 Cache with ECC
On-Chip Memory
• 256 KB On-Chip RAM
Direct memory access (DMA) controller
• 8-Channel DMA
Ethernet media access controller
(EMAC)
• Three 10/100/1000 EMAC with integrated DMA
USB On-The-Go controller (OTG)
• 2 USB OTG with integrated DMA
UART controller
• 2 UART 16550 compatible
Serial Peripheral Interface (SPI)
controller
• 4 SPI
I2C controller
• 5 I2C controllers
SD/SDIO/MMC controller
• 1 eMMC 4.5 with DMA and CE-ATA support
NAND flash controller
• 1 ONFI 1.0 or later 8 and 16 bit support
General-purpose I/O (GPIO)
• Maximum of 48 software programmable GPIO
continued...
1. Intel® Stratix® 10 TX Device Overview
683717 | 2022.08.18
Intel® Stratix® 10 TX Device Overview
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