1ST040EH2F35E2VLS1 datasheet(35/39 Pages) INTEL

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Figure 19.

SDM Block Diagram

Secure Device Manager

(SDM)

FPGA

Sector

LSM

FPGA

Sector

LSM

FPGA

Sector

LSM

FPGA

Sector

LSM

Configuration

Network

Customizable secure boot process

Private, public, and PUF-based

key support

Security Features

Interface bus used to transport

configuration data from SDM

throughout FPGA

Sectors can be selectively

configured and cleared of

sensitive parameters

Sectors configured in parallel

to reduce configuration time

LSM: Local Sector Manager

PUF: Physically Unclonable Function

During configuration, Intel Stratix 10 TX devices are divided into logical sectors, each

of which is managed by a local sector manager (LSM). The SDM passes configuration

data to each of the LSMs across the on-chip configuration network. This allows the

sectors to be configured independently, one at a time, or in parallel. This approach

achieves simplified sector configuration and reconfiguration, as well as reduced overall

configuration time due to the inherent parallelism. The same sector-based approach is

used to respond to single-event upsets and security attacks.

While the sectors provide a logical separation for device configuration and

reconfiguration, they overlay the normal rows and columns of FPGA logic and routing.

This means there is no impact to the Intel Quartus Prime software place and route,

and no impact to the timing of logic signals that cross the sector boundaries.

1. Intel® Stratix® 10 TX Device Overview

683717 | 2022.08.18

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Intel® Stratix® 10 TX Device Overview

1ST040EH2F35E2VLS1 Datasheet(PDF) 35 Page - Intel Corporation

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