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UPSD3422 Datasheet(PDF) 166 Page - STMicroelectronics

Part # UPSD3422
Description  Turbo Plus series Fast Turbo 8032 MCU with USB and programmable logic
PDF  300 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UPSD3422 Datasheet(HTML) 166 Page - STMicroelectronics

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USB interface
UPSD3422, UPSD3433, UPSD3434, UPSD3454
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USB global interrupt flag register (UIF0)
There are many different events that generate a USB interrupt requiring a number of
registers to indicate the cause of the interrupt. To more efficiently identify the cause of
the interrupt, the USB global interrupt flag register (see Table 112) indicates the type of
interrupt that occurred. Once the type of interrupt is identified, the associated interrupt
flag register may be read to determine the exact cause of the interrupt.
Table 112.
USB global interrupt flag register (UIF0 0E8h, reset value 00h)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
GLF
INF
OUTF
NAKF
RSTF
SUSPENDF
EOPF
RESUMF
Table 113.
UIF0 register bit definition
Bit
Symbol
R/W
Definition
7GLF
R
Global Interrupt flag
Logical OR of the RSTF, SUSPENDF, EOPF, and RESUMF
interrupt flags
6INF
R
IN FIFO Interrupt flag
Logical OR of the IN4F, IN3F, IN2F, IN1F, and IN0F interrupt
flags
5OUTF
R
OUT FIFO Interrupt flag
Logical OR of the OUT4F, OUT3F, OUT2F, OUT1F, and OUT0F
interrupt flags
4
NAKF
R
NAK FIFO Interrupt flag
Logical OR of the NAK4F, NAK3F, NAK2F, NAK1F, and NAK0F
interrupt flags
3RSTF
R/W
USB Reset flag
This bit is set when a USB Reset is detected on the D+ and D-
lines.
Note: A USB Reset does not reset the MCU nor the USB
module. Firmware should disable/enable the USB SIE using
the USEN bit in the UCTL register and initialize all USB related
registers as appropriate.
2
SUSPENDF
R/W
USB suspend mode flag
This bit is set when the SIE detects 3ms of no activity on the
bus and the clock to the SIE is also shut down to conserve
power. Clearing this bit turns the SIE clock on.
1
EOPF
R/W
End of Packet flag
This bit is set when a valid End of Packet sequence is detected
on the D+ and D– line.
0
RESUMEF
R/W
Resume flag
This bit is set when USB bus activity is detected while the
SUSPNDF Bit is set. When a Resume is detected, the
SUSPENDF bit must be cleared (if set) to turn the SIE clock on.
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