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UPSD3422 Datasheet(PDF) 173 Page - STMicroelectronics |
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UPSD3422 Datasheet(HTML) 173 Page - STMicroelectronics |
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173 / 300 page ![]() Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) UPSD3422, UPSD3433, UPSD3434, UPSD3454 USB interface 173/300 ● USB endpoint control register (UCON) The Endpoint selected by the USB endpoint select register (see Table 124 on page 172) determines the direction and FIFO (IN or OUT) that is controlled by the USB endpoint control register (see Table 126). The USB endpoint control register is used to control the selected Endpoint and provides some status about that Endpoint. Table 126. USB endpoint control register (UCON 0F1h, reset value 08h) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 – – – – Enable STALL TOGGLE BSY Table 127. UCON register bit definition Bit Symbol R/W Definition 7 – – Reserved 6 – – Reserved 5 – – Reserved 4 – – Reserved 3 ENABLE R/W Selected FIFO Enable Bit. Note: All FIFOs for each endpoint is enabled after a reset. 2STALL R/W Stall Control Bit When this bit is set, the Endpoint returns a STALL handshake whenever it receives an IN or OUT token. 1 TOGGLE R Data Toggle Bit – Endpoint IN Case The state of this bit determines the type of data packet (0=DATA0 or 1=DATA1) that will be sent during the next IN transaction. This bit is managed by the USB SIE. It is only toggled when an ACK is properly received during the IN transaction. In some cases it may be necessary for firmware to clear this bit. In this case, see the Important Notes section at the end of this data sheet. – Endpoint OUT Case The state of this bit indicates the type of data packet PID that the USB SIE expects to receive with the next OUT transaction (0=DATA0, 1=DATA1). If the Data Toggle for the next OUT transaction received is not as expected, the USB SIE assumes the host is retransmitting the last packet. In this case, an ACK is sent but no interrupt is generated since the original transmission of the packet was OK. This bit is managed by the USB SIE. It is only toggled when an OUT packet is properly received. In some cases it may be necessary for firmware to clear this bit. In this case, see the Important Notes section at the end of this data sheet. Important notes: 1. Disabling and enabling the USB SIE using the USBEN bit the UCTL register clears the TOGGLE bit for both directions of all endpoints. 2. Revision A silicon: See the Important Notes section at the end of the data sheet that explains the workaround for clearing this data toggle bit. 3. Revision B silicon: Disabling and Enabling the selected FIFO using the ENABLE bit in this register clears the data toggle bit for the selected endpoint's FIFO. Obsolete Product(s) - Obsolete Product(s) |
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