UPSD3422EB40U6 datasheet(227/300 Pages) STMICROELECTRONICS

227 / 300 page

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UPSD3422, UPSD3433, UPSD3434, UPSD3454

PSD module

227/300

Native product terms come from the AND-OR Array. Each OMC may borrow product terms

only from certain other OMCs, if they are not in use. Product term allocation does not add

any propagation delay to the logic. The fitter report generated by PSDsoft Express will show

any PT allocation that has occurred.

If an equation requires more product terms than are available to it through PT allocation,

then “external” product terms are required, which consumes other OMCs. This is called

product term expansion and also happens automatically in PSDsoft Express as needed. PT

expansion causes additional propagation delay because an additional OMC is consumed by

the expansion process and its output is rerouted (or fed back) into the AND-OR array. The

user can examine the fitter report generated by PSDsoft Express to see resulting PT

allocation and PT expansion (expansion will have signal names, such as ‘*.fb_0’ or ‘*.fb_1’).

PSDsoft Express will always try to fit the logic design first by using PT allocation, and if that

is not sufficient then PSDsoft Express will use PT expansion.

Product term expansion may occur in the DPLD for complex chip select equations for Flash

memory sectors and for SRAM, but this is a rare occurence. If PSDsoft Express does use

PT expansion in the DPLD, it results in an approximate 15ns additional propagation delay for

that chip select signal, which gives 15ns less time for the memory to respond. Be aware of

this and consider adding a wait state to the 8032 bus access (using the SFR named,

BUSCON), or lower the 8032 clock frequency to avoid problems with memory access time.

Figure 77.

OMC allocator

Table 168.

OMC port and data bit assignments

OMC

Port

assignment(1),(2)

Native product

terms from AND-OR

array

Maximum

borrowed product

terms

Data bit on 8032

data bus for

loading or

reading OMC

MCELLAB0

Port A0 or B0

MCELLAB1

Port A1 or B1

MCELLAB2

Port A2 or B2

MCELLAB3

Port A3 or B3

MCELLAB4

Port A4 or B4

MCELLAB5

Port A5 or B5

MCELLAB6

Port A6 or B6

MCELLAB7

Port A7 or B7

MCELLBC0

Port B0

MCELLBC1

Port B1

MCELLBC2

Port B or C2

PortC pins

Port B pins

Port A pins

(80-pin pkg only)

OMC Bank BC (MCELLBC0-7)

OMC Bank AB (MCELLAB0-7)

32 1 0

* = Used for JTAG,

pin not available

to GPLD

AI09177

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Product(s)

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UPSD3422EB40U6 Datasheet(PDF) 227 Page - STMicroelectronics

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