EM6620WS27 datasheet(46/56 Pages) EMMICRO

46 / 56 page

EM6620

www.emmicroelectronic.com

16.1.3 Voltage Regulator Option

By default the internal voltage regulator supplies the

core logic the RAM and the ROM. With option

MVreg(B) the regulator is cut and Vbat is supplying

the core logic the ROM and the RAM.

16.1.4 SVLD and Input Comp Level Option

By default the level is 2.0 Volts. The maximum value

is 3.3 Volt and the minimum is 1.2 Volts.

Before choosing a value other than the default,

please contact EM Microelectronic Marin SA, to

check for already existing levels.

The chosen value is called VSVLDNom.

16.1.5 Debouncer frequency Option

By default the debouncer frequency is ck[11]. The

user may choose ck[14] instead of ck[11].

Ck[14 ]corresponds to maximum 0.25ms debouncer

time in case of a 32kHz oscillator.

16.1.6 User defined LCD Segment allocation

If using a different segment allocation from the one described in chapter 0 , one needs to fill in the table

below.

The segment allocation connections are realized with the interconnect Metal 2 mask.

in case of 4 times

MUX

COM[1]

COM[2]

COM[3]

COM[4]

in case of 3 times

MUX

COM[1]

COM[2]

COM[3]

SEG[1]

SEG[2]

SEG[3]

SEG[4]

SEG[5]

SEG[6]

SEG[7]

SEG[8]

The customer should specify the required options at the time of ordering. A copy of

the pages 44 to 46 as well as the « Software ROM characteristic file » generated by

the assembler (*.STA) should be attached to the order. Also the Customer package

marking, 7 Characters, should be defined at that time.

Option

name

Default

value

user

value

MVreg

Voltage Regulator

YES

Option

name

Default

value

user

value

VSVLD

Comparator Level

and SVLD Level

2.0

Option

name

Default

value

user

value

MDeb

Debouncer freq.

ck[11]

EM6620WS27 Datasheet(PDF) 46 Page - EM Microelectronic - MARIN SA

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