MCP2518FD datasheet(17/96 Pages) MICROCHIP

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 2019 Microchip Technology Inc.

DS20006027A-page 17

MCP2518FD

bit 3

LPMEN: Low Power Mode (LPM) Enable( 3)

1 = When in LPM, the device will stop the clock and power down the majority of the chip. Register and

RAM values will be lost. The device will wake-up due to asserting nCS, or due to RXCAN activity.

0 = When in Sleep mode, the device will stop the clock, and retain it’s register and RAM values. It will

wake-up due to clearing the OSCDIS bit, or due to RXCAN activity.

bit 2

OSCDIS: Clock (Oscillator) Disable( 2)

1 = Clock disabled, the device is in Sleep mode.

0 = Enable Clock

bit 1

Unimplemented: Read as ‘0’

bit 0

PLLEN: PLL Enable( 1)

1 = System Clock from 10x PLL

0 = System Clock comes directly from XTAL oscillator

OSC –

MCP2518FD OSCILLATOR CONTROL REGISTER (CONTINUED)

Note 1:

This bit can only be modified in Configuration mode.

Clearing OSCDIS while in Sleep mode will wake-up the device and put it back in Configuration mode.

Setting LPMEN doesn’t actually put the device in LPM. It selects which Sleep mode will be entered after

requesting Sleep mode using CiCON.REQOP. In order to wake up on RXCAN activity, CiINT.WAKIE must

be set.

MCP2518FD Datasheet(PDF) 17 Page - Microchip Technology