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HC705RC16GRS/D Datasheet(PDF) 52 Page - NXP Semiconductors |
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HC705RC16GRS/D Datasheet(HTML) 52 Page - NXP Semiconductors |
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52 / 120 page ![]() Low-Power Modes General Release Specification MC68HC705RC16 — Rev. 3.0 Low-Power Modes Figure 6-1. Stop Recovery Timing Diagram 6.4 Stop Recovery The processor can be brought out of stop mode only by an external interrupt, LPRST, or RESET. Refer to Figure 6-1. NOTE: If an external interrupt is pending when stop mode is entered, then stop mode will be exited immediately. 6.5 Wait Mode The WAIT instruction places the MCU in a low power-consumption mode, but wait mode consumes more power than stop mode. All CPU action is suspended, but the core timer, the oscillator, and any enabled module remain active. Any interrupt or reset will cause the MCU to exit wait mode. The user must shut off subsystems to reduce power 3FFE 3FFE 3FFE 3FFE 3FFF INTERNAL ADDRESS BUS INTERNAL CLOCK IRQ3 IRQ2 RESET OSC11 t ILCH 4064 t CYC RESET OR INTERRUPT VECTOR FETCH t LIH t RL NOTES: 1. Represents the internal gating of the OSC1 pin 2. IRQ pin edge-sensitive mask option 3. IRQ pin level and edge-sensitive mask option Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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