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STM32H7B0AB Datasheet(PDF) 52 Page - STMicroelectronics |
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STM32H7B0AB Datasheet(HTML) 52 Page - STMicroelectronics |
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52 / 205 page ![]() Pin/ball name(1) (2) Pin name (function after reset) Pin type I/O structure Alternate functions Additional functions D4 C4 - 98 142 170 PE1 I/O FT_h2 LPTIM1_IN2, UART8_TX, FMC_NBL1, DCMI_D3/PSSI_D3, LCD_R6, EVENTOUT - A4 A4 - - - - VCAP S - - - - K10 63 99 - - VSS S - - - C4 D4 - - 143 171 PDR_ON S - - - B4 A3 - - - - VDDLDO S - - - - - 64 100 144 172 VDD S - - - - - - - - 173 PI4 I/O FT_h2 TIM8_BKIN, SAI2_MCK_A, TIM8_BKIN_COMP12, FMC_NBL2, DCMI_D5/PSSI_D5, LCD_B4, EVENTOUT - - - - - - 174 PI5 I/O FT_h2 TIM8_CH1, SAI2_SCK_A, FMC_NBL3, DCMI_VSYNC/PSSI_RDY, LCD_B5, EVENTOUT - - - - - - 175 PI6 I/O FT_h2 TIM8_CH2, SAI2_SD_A, FMC_D28, DCMI_D6/PSSI_D6, LCD_B6, EVENTOUT - - - - - - 176 PI7 I/O FT_h2 TIM8_CH3, SAI2_FS_A, FMC_D29, DCMI_D7/PSSI_D7, LCD_B7, EVENTOUT - - K12 - - - - VSS S - - - - G8 - - - - VSS S - - - - G9 - - - - VSS S - - - - H7 - - - - VSS S - - - - H8 - - - - VSS S - - - - H9 - - - - VSS S - - - - J8 - - - - VSS S - - - - K9 - - - - VSS S - - - - R15 - - - - VSS S - - - 1. The devices with SMPS correspond to commercial code STM32H7B0xIxxQ. 2. A non-connected I/O in a given package is configured as an output tied to VSS. Any analog peripheral connected to such a pad (such as OPAMP, VREF+) must be disabled. 3. Pxy_C and Pxy pins/balls are two separate pads (analog switch open). The analog switch is configured through a SYSCFG register. Refer to the product reference manual for a detailed description of the switch configuration bits. 4. There is a direct path between Pxy_C and Pxy pins/balls, through an analog switch. Pxy alternate functions are available on Pxy_C when the analog switch is closed. The analog switch is configured through a SYSCFG register. Refer to the product reference manual for a detailed description of the switch configuration bits. STM32H7B0xB Pin descriptions DS13196 - Rev 7 page 52/205 |
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