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STM32H7B0AB Datasheet(PDF) 93 Page - STMicroelectronics |
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STM32H7B0AB Datasheet(HTML) 93 Page - STMicroelectronics |
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93 / 205 page  Symbol Parameter Operating conditions(1) Min(2) Typ(2) Max(2) Unit Gmcritmax Maximum critical crystal gm Medium high drive capability µA/V LSEDRV[1:0] = 11, High drive capability - - 2.7 tSU(3) Startup time VDD is stabilized - 2 - s 1. Refer to the note and caution paragraphs below the table, and to the application note AN2867 “Oscillator design guide for ST microcontrollers. 2. Guaranteed by design. 3. tSU is the startup time measured from the moment it is enabled (by software) to a stabilized 32.768k Hz oscillation is reached. This value is measured for a standard crystal resonator and it can vary significantly with the crystal manufacturer. Note: For information on selecting the crystal, refer to the application note AN2867 “Oscillator design guide for ST microcontrollers” available from the ST website www.st.com. Figure 24. Typical application with a 32.768 kHz crystal STM32 OSC32_OUT fHSE CL1 RF 32.768 kHz resonator Bias controlled gain OSC32_IN CL2 Resonator with integrated capacitors 1. An external resistor is not required between OSC32_IN and OSC32_OUT and it is forbidden to add one. 6.3.10 Internal clock source characteristics The parameters given in Table 49. HSI48 oscillator characteristics to Table 52. LSI oscillator characteristics are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 20. General operating conditions. 48 MHz high-speed internal RC oscillator (HSI48) Table 49. HSI48 oscillator characteristics Symbol Parameter Conditions Min Typ Max Unit fHSI48 HSI48 frequency VDD = 3.3 V, TJ = 30 °C 47.5(1) 48 48.5(1) MHz TRIM(2) User trimming step - - 0.175 0.250 % USER TRIM COVERAGE(3) User trimming coverage ± 32 steps ±4,70 ±5.6 - % DuCy(HSI48)(2) Duty cycle - 45 - 55 % ACCHSI48_REL(3) Accuracy of the HSI48 oscillator over temperature (reference is 30 °C) TJ = −40 to 130 °C −4.5 - 4 % ΔVDD(HSI48)(2) HSI48 oscillator frequency drift with VDD (reference is 3.3 V) VDD = 3 to 3.6 V - 0.025 0.05 % VDD = 1.62 to 3.6 V - 0.05 0.1 tsu(HSI48)(2) HSI48 oscillator startup time - - 2.1 4.0 µs IDD(HSI48)(2) HSI48 oscillator power consumption - - 350 400 µA NT jitter(2) Next transition jitter accumulated jitter on 28 cycles - - ± 0.15 - ns STM32H7B0xB Operating conditions DS13196 - Rev 7 page 93/205 |
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