84329B DATA SHEET

REVISION B 07/29/14

8

700MHZ, LOW JITTER, CRYSTAL-TO-3.3V LVPECL

FREQUENCY SYNTHESIZER

Application Information

Recommendations for Unused Input and Output Pins

Inputs:

LVCMOS Control Pins

All control pins have internal pull-ups or pull-downs; additional

resistance is not required but can be added for additional protection.

A1k

 resistor can be used.

Outputs:

TEST Output

The unused TEST output can be left floating. There should be no

trace attached.

LVPECL Output

All unused LVPECL outputs can be left floating. We recommend that

there is no trace attached. Both sides of the differential output pair

should either be left floating or terminated.

Power Supply Filtering Technique

As in any high speed analog circuitry, the power supply pins are

vulnerable to random noise. To achieve optimum jitter performance,

power supply isolation is required. The 84329B provides separate

power supplies to isolate any high switching noise from the outputs

to the internal PLL. VCC and VCCA should be individually connected

to the power supply plane through vias, and 0.01µF bypass

capacitors should be used for each pin. Figure 2 illustrates how a

10

 resistor along with a 10F and a 0.01F bypass capacitor should

be connected to each VCCA pin. The 10 resistor can also be

replaced by a ferrite bead.

Figure 2. Power Supply Filtering

Crystal Input Interface

The 84329B has been characterized with 18pF parallel resonant

crystals. The capacitor values, C1 and C2, shown in Figure 3 below

were determined using a 25MHz, 18pF parallel resonant crystal and

were chosen to minimize the ppm error. The optimum C1 and C2

values can be slightly adjusted for different board layouts.

Figure 3. Crystal Input Interface

VDD

VDDA

2.5V

10

Ω

10µF

.01µF

.01µF

XTAL_IN

XTAL_OUT

X1

18pF Parallel Crystal

C1

22pF

C2

22pF