S12SCIV3SLASHD datasheet(20/98 Pages) NXP

Part #	S12SCIV3/D

Description	The SoC Guide provides information about the MC9S12KG128 device made up of standard HCS12 blocks and the HCS12 processor core

PDF	98 Pages

Scroll/Zoom	100%

Manufacturer	NXP [NXP Semiconductors]

Direct Link	http://www.nxp.com

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20 / 98 page

MC9S12KG128 SoC Guide — V01.01

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50MHz equivalent to 25MHz Bus Speed

•

112-Pin LQFP or 80-Pin QFP package

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I/O lines with 3.3V/5V input and drive capability

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3.3V/5V A/D converter inputs

1.3 Modes of Operation

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Normal modes

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Normal Single-Chip Mode

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Normal Expanded Wide Mode1

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Normal Expanded Narrow Mode1

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Emulation Expanded Wide Mode1

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Emulation Expanded Narrow Mode1

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Special Operating Modes

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Special Single-Chip Mode with active Background Debug Mode

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Special Test Mode1 (Freescale use only)

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Special Peripheral Mode1 (Freescale use only)

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Each of the above modes of operation can be configured for three Low power submodes

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Stop Mode

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Pseudo Stop Mode

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Wait Mode

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Secure operation, preventing the unauthorized read and write of the memory contents.

1.4 System Memory Map

Shows the device memory map of the MC9S12KG128 after reset

Table 1-1 Device Memory Map

NOTES:

1. Expanded modes are only available in the 112 pin package version.

Address

Module

Size

$000 - $017

CORE (Ports A, B, E, Modes, Inits, Test)

$018

Reserved

$019

Voltage Regulator (VREG)

$01A - $01B

Device ID register (PARTID)

$01C - $01F

CORE (MEMSIZ, IRQ, HPRIO)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

S12SCIV3/D Datasheet(PDF) 20 Page - NXP Semiconductors

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