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ISL71841SEHF/PROTO Datasheet(PDF) 13 Page - Renesas Technology Corp |
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ISL71841SEHF/PROTO Datasheet(HTML) 13 Page - Renesas Technology Corp |
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13 / 30 page ![]() ISL71841SEH FN8735 Rev. 7.00 Page 13 of 30 Feb 23, 2018 FIGURE 19. TYPICAL ADDRESS TO OUTPUT DELAY (V± = ±15V, +25°C) FIGURE 20. ADDRESS TO OUTPUT DELAY (HIGH TO LOW) FIGURE 21. ADDRESS TO OUTPUT DELAY (LOW TO HIGH) FIGURE 22. TYPICAL ENABLE TO OUTPUT DELAY (V± = ±15V, +25°C) FIGURE 23. ENABLE TO OUTPUT DELAY (LOW TO HIGH) FIGURE 24. DISABLE TO OUTPUT DELAY (LOW TO HIGH) Typical Performance Curves V±= ±15V, V CM = 0V, RL = Open, TA = +25°C, unless otherwise specified. (Continued) tADDLH = 211.199ns tADDHL = 561.469ns 500ns/DIV 5V/DIV 2V/DIV 0 100 200 300 400 500 600 700 10 11 12 13 14 15 16 17 +125°C -55°C +25°C SPLIT SUPPLY RAILS (±V) 0 50 100 150 200 250 300 10 11 12 13 14 15 16 17 +125°C +25°C -55°C SPLIT SUPPLY RAILS (±V) tDISABLE = 202.207ns tENABLE = 352.379ns 500ns/DIV 1V/DIV 5V/DIV 0 100 200 300 400 500 600 10 11 12 13 14 15 16 17 SPLIT SUPPLY RAILS (±V) +125°C +25°C -55°C 0 50 100 150 200 250 300 350 400 10 11 12 13 14 15 16 17 SPLIT SUPPLY RAILS (±V) +25°C -55°C +125°C |
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