| Electronic Components Datasheet Search |
|
STM32MP153F Datasheet(PDF) 32 Page - List of Unclassifed Manufacturers |
|
|
|||||||||||||||||||||||||||||
STM32MP153F Datasheet(HTML) 32 Page - List of Unclassifed Manufacturers |
|
32 / 38 page ![]() 32 OSD32MP15x Datasheet Rev. 7 11/30/2022 Octavo Systems LLC Copyright 2020-2022 7.5.7 PMIC_VBUSOTG PMIC_VBUSOTG is the output of the PWR_USB_SW in the STPMIC1A. It is designed to power USB OTG port or USB Type-C. The input of the switch is connected to the PMIC_BSTOUT internal to the STPMIC1A. The output voltage of the PWR_USB_SW is approximately equal to the PMIC_BSTOUT. 7.5.8 PMIC_SWOUT PMIC_SWOUT is the output of the PWR_SW internal to the STPMIC1A. The input of the switch is brought out to the PMIC_SWIN pin. The output voltage of PMIC_SWOUT will be about equal to the input voltage provided on PMIC_SWIN. 7.6 Internal Power The OSD32MP15x has power rails generated by the STPMIC1A that are used internally by the OSD32MP15x. While some of the output voltages of the regulators can be adjusted, they should not be adjusted. Adjusting the voltages on these rails will cause the OSD32MP15x device not to function. These power pins should not be uses to power external components. Doing so can prevent the OSD32MP15x from functioning properly. However, they may be used for debugging / monitoring the system and as reference voltage outputs. 7.6.1 VDD_CORE VDD_CORE is generated by Buck1 in the STPMIC1A. It provides the core power to the STM32MP15x integrated into the OSD32MP15x. By default, its voltage is 1.2V. See Table 7-1 for required STPMIC1A configuration of this voltage rail. 7.6.2 VDD_DDR VDD_DDR is generated by Buck2 in the STPMIC1A. It provides the power to the DDR memory integrated into the OSD32MP15x. By default, its voltage is 1.1V. See Table 7-1 for required STPMIC1A configuration of this voltage rail. 7.6.3 VDD VDD is generated by Buck3 in the STPMIC1A. It provides the power to the VDD Power domain of the STM32MP15x integrated into the OSD32MP15x. By default, this voltage is set to 3.3V. The VDD output is used to set the I/O voltage for the STM32MP15x. Therefore, the output voltage can be modified to support both 1.8V and 3.3V I/O operation. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |