ES9080 datasheet(67/146 Pages) ESS

67 / 146 page

CONFIDENTIAL ADVANCE INFORMATION 0.4.3

ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM

ES9080 Product Datasheet

Bits

[7:6]

[5:4]

[3:2]

[1:0]

Default

2'd0

2’d0

2'd0

Bits

Mnemonic

Description

[7:6]

RESERVED

[5:4]

BCK_WS_FAILED_CONFIG

When BCK/WS ratio fails:

•

2’b00: No operation (default)

•

2’b01: Reserved

•

2’b10: Force DAC to AVCC/2

•

2’b11: Force DAC to ground

[3:2]

CLK_AVALID_CONFIG

When SYS_CLK clock fails:

•

2'b00: No operation (default)

•

2'b01: Force DAC power down

•

2'b10: Force DAC to AVCC/2

•

2'b11: Force DAC to ground

[1:0]

RESERVED

Bits

[7]

[6]

[5:3]

[2:1]

[0]

Default

1'b0

3'd0

2'd0

1'b0

Bits

Mnemonic

Description

[7]

RESERVED

[6]

CLEAR_CLK_REF_CNT

Write 1 to clear/disable RWS_REF counter, then write 0 to

start the counter. 0 by default.

[5:3]

RWS_REF_CNT_SEL

The RWS_REF counter will count for N RWS pos edges using

CLK_IDAC. N is:

•

3'd0: 256 (default)

•

3'd1: 512

•

3'd2: 1024

•

3'd3: 2048

•

3'd4: 4096

•

3'd5: 8192

•

3'd6: 16384

•

3'd7: 32768

[2:1]

RESERVED

[0]

ENABLE_FBDIV_TUNE

Enables FB_DIV tuning logic using the RWS_REF counter.

•

1'b0: Disabled (default)

•

1'b1: Enabled

ES9080 Datasheet(PDF) 67 Page - ESS Technology,Inc

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