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ES9080 Datasheet(PDF) 12 Page - ESS Technology,Inc

Part # ES9080
Description  32-bit High-Performance 8-Channel DAC
PDF  146 Pages
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Manufacturer  ESS [ESS Technology,Inc]
Direct Link  http://www.esstech.com
Logo ESS - ESS Technology,Inc

ES9080 Datasheet(HTML) 12 Page - ESS Technology,Inc

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CONFIDENTIAL ADVANCE INFORMATION 0.4.3
ES9080 Product Datasheet
ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM
12
THD Compensation
The ES9080 has built-in THD compensation to help compensate for second and third harmonics that may be present on the output signal. The
compensation is controlled through 4 individual 16-bit coefficients in the THD Compensation Coefficient Registers.
Using THD Compensation for differential mode (4 channel mode) where Channels 1&2, 3&4, 5&6, 7&8 are paired to create 4 differential channels,
THD coefficients need to be the same for each pair. Therefore, C2 & C3 would be the same for all channels.
The following equation displays how the second and third harmonics are affected by the C2 and C3 values:
������������������������������������ = ������ + ������2 ∗ ������2 + ������3 ∗ ������3
THD Compensation Coefficient Registers
Registers 111-112: THD COMP C2 CH1/3/5/7
Registers 113-114: THD COMP C3 CH1/3/5/7
Registers 115-116: THD COMP C2 CH2/4/6/8
Registers 117-118: THD COMP C3 CH2/4/6/8
Dynamic Range Enhancement (DRE)2
The DRE controller is composed of a peak detector with a programmable rate. If the input audio stream peak level decays below the DRE ON
THRESHOLD value, the controller will attenuate the analog gain by 16.37 dB, while simultaneously increasing the digital gain by the value of DRE
GAIN CHx/x/x/x. DRE will remain engaged until the input audio stream peak level rises above the DRE OFF THRESHOLD value. The rate at which
the peak level decay is determined by DRE DECAY RATE.
Control over various device functions is given to the DRE peak filter through the DRE ATT EN AND THDR CTRL registers. Once configured, the
DRE FORCE registers may be configured to enable DRE on the desired channels.
The DRE peak filter is disabled by default and is enabled by setting the PEAK FILTER bit.
DRE Configuration Registers
Register 144-145: DRE ON THRESHOLD
Register 140-141: DRE GAIN CH1/3/5/7
Register 142-143: DRE GAIN CH2/4/6/8
Register 146-147: DRE OFF THRESHOLD
Register 148: DRE DECAY RATE
Register 136: DRE ATT EN AND THDR CTRL
Register 139: DRE FORCE
Register 108[5]: PEAK_FILTER
Note: Some implementations of DRE may experience a pop noise due to a possible small DC level change between DRE transitions, in particular
when used with external output stage.
2
For more information regarding the DRE Peak Filter, please reference the DRE Configuration application note. Available from your local FAE upon
request.



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