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TLK2218ZPV Datasheet(PDF) 7 Page - Texas Instruments

Part # TLK2218ZPV
Description  8-PORT GIGABIT ETHERNET TRANSCEIVER
PDF  39 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TLK2218ZPV Datasheet(HTML) 7 Page - Texas Instruments

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Receive Data Bus and Clock Signals
TLK2218
SLLS734 – FEBRUARY 2007
SIGNAL
LOCATION
TYPE
DESCRIPTION
TDHG9
B13
LVCMOS
Transmit data channels G and H. When CODE = low, this terminal is the 10th bit of a 10-bit
input with
word. When CODE = high, this terminal should be left floating or tied low to ground.
P/D
In independent channel mode, the transmit clock that latches this input is TCLKH. In all
other modes, the transmit clock is TCLKB.
SIGNAL
LOCATION
TYPE
DESCRIPTION
RCLK/RBCH
R10
LVCMOS
Receive byte clock. In synchronized channel modes (nibble mode or multiplexed channel
output
mode), RCLK is a buffered version of REFCLK used by the protocol device to latch the
received data output on RDBA[9:0], RDDC[9:0], RDFE[9:0] and RDHG[9:0].
With the internal CTC FIFO disabled (only valid for nibble interface mode), this clock is
1/10th the clock recovered from the incoming data stream. If CTC is enabled, this clock is a
buffered version of REFCLK.
This terminal is internally series-terminated to provide direct connection to a 50-
Ω
transmission line.
RBC[G:A]
R9, R8, R7,
LVCMOS
Individual receive byte clock channels A through G. Recovered clock for channels A
R6, R5, R4,
output
through G.
P4
When in independent channel mode, these clocks are used by the protocol device to latch
the received data output for channels A through G. Data is aligned to both the rising and
falling edges. When in nibble interface mode with the internal CTC FIFO disabled, these
terminals are 1/10th the clock recovered from the incoming data stream. If CTC is enabled,
these clocks are all buffered versions of REFCLK.
When in multiplexed channel mode, the RBCG clock becomes a complementary output to
RCLK/RBCH. Similarly, RBCB and RBCA, RBCD and RBCC, RBCF and RBCE are paired
clock copies of RCLK/RBCH and RBCG.
These terminals are internally series-terminated to provide direct connection to a 50-
Ω
transmission line.
RDBA[7:0]
N2, N1, M2,
LVCMOS
Receive data channels A and B. The parallel data is clocked out of the transceiver on the
M1, L2, L1,
output
rising and falling edges of the receive clock.
K2, K1
In multiplexed channel mode, data for channel B is aligned to the rising edge of RCLK and
data channel A is aligned to the falling edge of RCLK (see Figure 6 for clarity).
In nibble mode, data is output least-significant nibble first, aligned to the falling edge of the
receive clock, followed by the most-significant nibble aligned to the rising edge. Channel A
is output on RDBA[4] and channel B is output on RDBA[9:5]. When CODE = high, RDBA3
acts as the K-flag bit for channel A on the rising edge of RCLK.
These terminals are internally series-terminated to provide direct connection to a 50-
Ω
transmission line.
RDBA8
P1
LVCMOS
Receive data/K-flag, channels A and B. The parallel data is clocked out of the transceiver
output
on the rising and falling edges of the receive clock.
In multiplexed channel mode, when CODE = low, this terminal is the 9th bit of a 10-bit word
received. When CODE = high, this terminal acts as the K-flag bit. When RDBA8 = high,
this terminal indicates that the data on RDBA[7:0] is a K-character.
In nibble interface mode, when CODE = low, this terminal is the 4th and 9th bits of a 10-bit
word received on channel B. When CODE = high, this terminal acts as the 4th bit on the
falling edge and as the K-flag bit on the rising edge for channel B. When RDBA8 = high,
this terminal indicates that the data on RDBA[7:0], output on the rising and falling edges of
the receive clock, is a K-character.
This terminal is internally series-terminated to provide direct connection to a 50-
Ω
transmission line.
RDBA9
P2
LVCMOS
Receive data 9, channels A and B. The parallel data is clocked out of the transceiver on
output
the rising and falling edges of the receive clock. In multiplexed channel mode, when CODE
= low, this terminal is the 10th bit of a 10-bit word received.
In nibble interface mode, when CODE = low, this terminal is the 5th and 10th bits of a 10-bit
word received on channel B.
This terminal is internally series-terminated-to provide direct connection to a 50-
Ω
transmission line.
7
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