TLK2218ZPV datasheet(8/39 Pages) TI

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TLK2218

SLLS734 – FEBRUARY 2007

SIGNAL

LOCATION

TYPE

DESCRIPTION

RDDC[7:0]

P3, R3, T2,

LVCMOS

Receive data channels C and D. The parallel data is clocked out of the transceiver on the

U2, U1, T1,

output

rising and falling edges of the receive clock.

R2, R1

In multiplexed channel mode, data for channel D is aligned to the rising edge of RCLK and

data channel C is aligned to the falling edge of RCLK (see Figure 6 for clarity).

In nibble mode, data is output least-significant nibble first, aligned to the falling edge of the

receive clock, followed by the most-significant nibble aligned to the rising edge. Channel C

is output on RDDC[4] and channel D is output on RDDC[9:5]. When CODE = high, RDDC3

acts as the K-flag bit for channel C on the rising edge of RCLK.

These terminals are internally series-terminated to provide direct connection to a 50-

Ω

transmission line.

RDDC8

LVCMOS

Receive data/K-flag, channels C and D. The parallel data is clocked out of the transceiver

output

on the and falling edges of the receive clock.

In multiplexed channel mode, when CODE = low, this terminal is the 9th bit of a 10-bit word

received. When CODE = high, this terminal acts as the K-flag bit. When RDDC8 = high,

this terminal indicates that the data on RDDC[7:0] is a K-character.

In nibble interface mode, when CODE = low, this terminal is the 4th and 9th bits of a 10-bit

word received on channel D. When CODE = high, this terminal acts as the 4th bit on the

falling edge and as the bit on the rising edge for channel D. When RDDC8 = high, this

terminal indicates that the data RDDC[7:0], output on the rising and falling edges of the

receive clock, is a K-character.

This terminal is internally series-terminated to provide direct connection to a 50-

Ω

transmission.

RDDC9

LVCMOS

Receive data 9, channels C and D. The parallel data is clocked out of the transceiver on

output

the rising and falling edges of the receive clock. In multiplexed channel mode, when CODE

= low, this terminal is the 10th bit of a 10-bit word received.

In nibble interface mode, when CODE = low, this terminal is the 5th and 10th bits of a 10-bit

word received on channel D.

This terminal is internally series-terminated to provide direct connection to a 50-

Ω

transmission line.

RDFE[7:0]

T7, U7, T6,

LVCMOS

Receive data channels E and F. The parallel data is clocked out of the transceiver on the

U6, T5, U5,

output

rising and falling edges of the receive clock.

T4, U4

In multiplexed channel mode, data for channel F is aligned to the rising edge of RCLK and

data for channel E is aligned to the falling edge of RCLK (see Figure 6 for clarity).

In nibble mode, data is output least-significant nibble first, aligned to the falling edge of the

receive clock, followed by the most-significant nibble aligned to the rising edge. Channel E

is output on RDFE[4:0] and channel F is output on RDFE[9:5]. When CODE = high,

RDFE3 acts as the K-flag bit for channel E on the rising edge of RCLK.

These terminals are internally series-terminated to provide direct connection to a 50-

Ω

transmission line.

RDFE8

LVCMOS

Receive data/K-flag, channels E and F. The parallel data is clocked out of the transceiver

output

on the rising and falling edges of the receive clock.

In multiplexed channel mode, when CODE = low, this terminal is the 9th bit of a 10-bit word

received. When CODE = high, this terminal acts as the K-flag bit. When RDFE8 = high,

this terminal indicates that the data on RDFE[7:0] is a K-character.

In nibble interface mode, when CODE = low, this terminal is the 4th and 9th bits of a 10-bit

word received on channel F. When CODE = high, this terminal acts as the 4th bit on the

falling edge and as the K-flag bit on the rising edge for channel F. When RDFE8 = high,

this terminal indicates that the data on RDFE[7:0], output on the rising and falling edges of

the receive clock, is a K-character.

This terminal is internally series terminated to provide direct connection to a 50-

Ω

transmission line.

RDFE9

LVCMOS

Receive data 9, channels E and F. The parallel data is clocked out of the transceiver on

output

the rising and falling edges of the receive clock.

In multiplexed channel mode, when CODE = low, this terminal is the 10th bit of a 10-bit

word received. In nibble interface mode, when CODE = low, this terminal is the 5th and 10th

bits of a 10-bit word received on channel F.

This terminal is internally series terminated to provide direct connection to a 50-

Ω

transmission line.

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