NXP Semiconductors

P5DF081_SDS

MIFARE secure access module SAM AV2

8 Functional specification

8.1 Hardware interface

8.1.1 Contact interface

The pad assignment and the electrical characteristics are fully compliant with ISO/IEC 7816 (part 2 and part 3).

The MIFARE SAM AV2 operates with Class A and Class B interface devices. An internal charge pump provides

the EEPROM programming voltage. Note that pad C6 is not a programming voltage input but is an output line

for the clock signal for I2C communication to the RC52x or RC663 reader chip. Pad C8 is used as data line to

the reader chip. These two pads for connection to the RC52x or RC663 are the only ones deviating from the

ISO standard pin assignment.

8.1.2 External clock frequency and bit rates

The basic operation frequency of the MIFARE SAM AV2 is 3.5712 MHz. With this frequency the following

standard bit rates can be reached using ISO/IEC 7816 transmission factors F and D.

The MIFARE SAM AV2 supports significantly higher transmission speeds.

The maximum specified bit rate in any case is 1.5 Mbit/s.

8.1.3 Card operation procedures

All card operation procedures (activation, cold reset, warm reset and deactivation) are fully compliant with [4],

Chapter 5.

8.2 Transmission procedure and communication

8.2.1 Protocol activation sequence

All subsequently described operations are compliant with ISO/IEC 7816-3.

8.2.1.1 Answer To Reset (ATR)

The MIFARE SAM AV2 offers two modes of operation identified by different ATRs. A negotiable mode where

the bit rate has to be adjusted via a PPS request and a specific mode where the MIFARE SAM AV2 switches

automatically to F = 128 and D = 32 (highest possible speed) after sending the ATR. Starting with the negotiable

mode, the mode of operation is switched after every warm reset.

After a cold reset, the card sends the following ATR to the terminal.

Character

Value

Meaning

TS

3Bh

initial character; setting up direct convention

T0

DFh

TA(1), TC(1), TD(1) are present; number of historical characters

is 15

TA(1)

18h

F = 372; D = 12

TC(1)

FFh

no extra guard time needed; N = 255

TD(1)

81h

TD(2) is present; protocol T = 1

TD(2)

F1h

TA(3), TB(3), TC(3) and TD(3) are present; protocol T = 1

Table 5. ATR after cold reset

P5DF081_SDS

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Product short data sheet

Rev. 3.3 — 13 September 2023

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