ADMV8505ACCZ-R7 datasheet(11/31 Pages) AD

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Data Sheet

ADMV8505

THEORY OF OPERATION

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Rev. 0 | 11 of 31

MODE SELECTION

The ADMV8505 has two modes of operation: SPI write and SPI fast

latch. The SPI write mode is the normal operating mode, and the

SPI fast latch mode is used to sequence through the on-chip lookup

table (LUT) using the internal state machine. To select the SPI write

mode, set the SFL pin low. For operation in SPI fast latch mode,

program the on-chip lookup table and fast latch parameters with the

SFL pin low. Then, bring the SFL pin high to enter the SPI fast latch

mode. Figure 21 shows a simplified representation of the SPI with

the register map and internal state machine.

Figure 21. Simplified SPI Diagram

SPI WRITE MODE

The SPI write mode has a write grouping (WR) in Register 0x020

through Register 0x022. The grouping consists of the following:

►

fCENTER load value

►

Bandwidth load value

►

Match load value

See the Register Details section more information regarding the

write grouping.

SPI STREAMING

In general, there are two types of SPI streaming transactions, Endi-

an register ascending order and descending order. The ADMV8505

supports only the ascending order. To enable SPI streaming with

Endian register ascending order, program Register 0x000 to value

0x3C.

For SPI streaming to the write grouping, Register 0x020 to

40 bits in total (R/W bit + 15 bits address + 24 bits data).

For SPI streaming to the lookup table, Register 0x100 to

784 bits in total (R/W bit + 15 bits address + 768 bits data).

INTERPOLATION FUNCTIONS

The ADMV8505 has three interpolation functions that allow the

user to specify the fCENTER of the filter using the fCENTER load

value only. Then, the appropriate capacitor codes are determined

automatically. To enable these functions, set the INTERPOLATE bit

(Register 0x050) high. Figure 22 shows a simplified diagram of the

interpolation functions.

Figure 22. Interpolation Diagram

When the interpolation functions are enabled, the fCENTER load

range is 0 to 255, where 0 corresponds to the lowest frequency, and

255 corresponds to the highest frequency. For example, a value

of 0 corresponds to approximately 225 MHz, and 255 corresponds

to approximately 520 MHz. The fCENTER load value is used to

determine the appropriate capacitor codes based on the on-chip

interpolation coefficients.

By default, the recommended interpolation coefficients are set for

nominal bandwidth. The interpolation coefficients can be adjusted

between ± 2% of nominal bandwidth with reasonable insertion

loss. Narrower bandwidth, down to approximately 5%, can also be

achieved at the expense of insertion loss.

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