SST26VF032B-104ISLASHSM datasheet(36/82 Pages) MICROCHIP

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SST26VF032B/SST26VF032BA

DS20005218K-page 36

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5.34

Write Block Protection Register

(WBPR)

The Write Block Protection Register (WBPR) command

changes the Block Protection register data to indicate

the protection status. Execute WREN before executing

WBPR.

To execute a Write Block Protection Register operation

the host drives CE# low, sends the Write Block Protec-

tion Register command cycle (42H), sends 18 cycles of

data, and finally drives CE# high. Data input must be

most significant bit(s) first. See Table 5-6 for definitions

of each bit in the Block Protection register. See

Figure 5-38 and Figure 5-39.

FIGURE 5-38:

WRITE BLOCK PROTECTION REGISTER SEQUENCE (SQI)

FIGURE 5-39:

WRITE BLOCK PROTECTION REGISTER SEQUENCE (SPI)

Note:

MSN = Most Significant Nibble, LSN = Least Significant Nibble

Block Protection Register (BPR) C[1:0]=42H

MODE 3

SCK

SIO[3:0]

CE#

C1 C0

MODE 0

H0 L0

MSN LSN

H1 L1

H2 L2

H3 L3

H4 L4

H5 L5

HN LN

BPR [79:72]

BPR [7:0]

Note:

C[1:0]=42H

CE#

SCK

Data Byte0

01 2 3 4 5 6 7 8

Data Byte1

Data Byte2

Data ByteN

42H

15 16

23 24

31 32

MODE 0

MODE 3

OP Code

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