AM79C940JCSLASHW datasheet(51/144 Pages) AMD

51 / 144 page

Am79C940

Minimum frame size (excluding preamble,

including FCS)

64 bytes

512 bits

Preamble/SFD size

8 bytes

64 bits

FCS size

4 bytes

32bits

To be classed as a minimum size frame at the receiver,

the transmitted frame must contain:

Preamble

(Min Frame Size + FCS) bits

At the point that FCS is to be appended, the transmitted

frame should contain:

Preamble

(Min Frame Size – FCS) bits

(512

–

32) bits

A minimum length transmit frame from the MACE

device will therefore be 576 bits, after the FCS is

appended.

The Ethernet specification makes no use of the LLC

pad field, and assumes that minimum length messages

will be at least 64 bytes in length.

Transmit FCS Generation

Automatic generation and transmission of FCS for a

transmit frame depends on the value of DXMTFCS

(Disable Transmit FCS) when the EOF is asserted indi-

cating the last byte/word of data for the transmit frame

is being written to the FIFO. The action of writing the

last data byte/word of the transmit frame, latches the

current contents of the Transmit Frame Control regis-

ter, and therefore determines the programming of

DXMTFCS for the transmit frame. When DXMTFCS =

0 the transmitter will generate and append the FCS to

the transmitted frame. If the automatic padding feature

is invoked (APAD XMT in Transmit Frame Control), the

FCS will be appended regardless of the state of DXMT-

FCS. Note that the calculated FCS is transmitted most

significant bit first. The default value of DXMTFCS is 0

after hardware or software reset.

Transmit Status Information

Although multiple transmit frames can be queued in the

Transmit FIFO, the MACE device will not permit loss of

Transmit Frame Status information. The Transmit

Frame Status and Transmit Retry Count can only be

buffered internally for a maximum of two frames. The

MACE device will therefore not commence a third

transmit frame, until the status from the first frame is

read. Once the Transmit Retry Count and Transmit

Frame Status for the first transmit packet is read, the

MACE device will autonomously begin the next trans-

mit frame, provided that a transmit frame is pending,

the XMTSP threshold has been exceeded (or the

XMT FIFO is full), the network medium is free, and the

IPG time has elapsed.

Indication of valid Transmit Frame Status can be

obtained by servicing the hardware interrupt and test-

ing the XMTINT bit in the Interrupt Register, or by poll-

ing the XMTSV bit in the Poll register if a continuous

polling mechanism is required. If the Transmit Retry

Count data is required (for loading, diagnostic, or man-

agement information), XMTRC must be read prior to

XMTFS. Reading the XMTFS register when the

XMTSV bit is set will clear both the XMTRC and

XMTFS values.

Transmit Exception Conditions

Exception conditions for frame transmission fall into

two distinct categories; those which are the result of

normal network operation and those which occur due

to abnormal network and/or host related events.

Normal events which may occur and which are handled

autonomously by the MACE device are:

(a)

Collisions within the slot time with automatic retry

(b)

Deletion of packets due to excessive transmis-

sion attempts.

(a) The MACE device will ensure that collisions which

occur within 512 bit times from the start of transmission

(including preamble) will be automatically retried with

no host intervention. The Transmit FIFO ensures this

by guaranteeing that data contained within the Trans-

Preamble

1010....1010

SYNCH

Dest

Addr

Srce

Addr

Type

Data

FCS

Bits

Bytes

46—1500

Bytes

16235D-8

Ethernet Format Data Frame

AM79C940JC/W Datasheet(PDF) 51 Page - Advanced Micro Devices

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