7549 datasheet(32/73 Pages) RENESAS

32 / 73 page

Rev.2.00

Mar 05, 2007

Page 32 of 70

REJ03B0202-0200

7549 Group

PRELIMINARY

Notice: This is not a final specification.

Some parametric limits are subject to change.

Fig 39. Block diagram of capture channel 0

Fig 40. Capture input waveform (capture interrupt edge selection bit = “rising edge”)

Fig 41. Capture input waveform (capture interrupt edge selection bit = “rising and falling edge”)

Data bus

Capture register

Capture/Compare

(001216, bits 0-2)

Capture latch 0 (16)

Capture trigger

Capture pointer

Capture latch 0x

software trigger bits

(003116, bits 0, 1)

P03/

CAP0

Capture latch 00 (16) Capture latch 01 (16)

Rising

Falling

Capture 0 interrupt

edge selection bits

(003216, bits 0, 1)

Capture Interrupt

Timer A counter (16)

Digital filter

Capture 0 status bit

(002F16, bit 3)

Low-speed on-chip

oscillator/16

Capture 0 noise filter

clock selection bits

(003216, bits 2, 3)

Capture 0 input

port selection bit

(002E16, bit 0)

Timer A underflow

Capture input wave

Timer A count value

Capture latch 00

000B

000C

000D

000E

000F

0000

0002

0003

0004

0005

0006

0007

0008

0009

000B

000C

XXXX

Re-load the timer A count value

Capture latch 01

Capture 0 interrupt

Capture 0 status bit

XXXX

000A

0001

000C

0005

000F

Overwrite

0001

000A

Timer A underflow

000B

000C

000D

000E

000F

0000

0001

0002

0003

0004

0005

0006

0007

0008

0009

000A

000B

000C

XXXX

000A

0001

000C

0005

000F

Capture input wave

Timer A count value

Capture latch 00

Capture latch 01

Capture 0 interrupt

Capture 0 status bit

Re-load the timer A count value

Overwrite

7549 Datasheet(PDF) 32 Page - Renesas Technology Corp

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