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PIC18F4685-I/SP Datasheet(PDF) 362 Page - Microchip Technology |
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PIC18F4685-I/SP Datasheet(HTML) 362 Page - Microchip Technology |
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362 / 484 page ![]() PIC18F2682/2685/4682/4685 DS39761B-page 360 Preliminary © 2007 Microchip Technology Inc. FIGURE 24-6: TABLE WRITE (WRTn) DISALLOWED FIGURE 24-7: EXTERNAL BLOCK TABLE READ (EBTRn) DISALLOWED 000000h 0007FFh 000800h 003FFFh 004000h 007FFFh 008000h 00BFFFh 00C000h 00FFFFh WRTB, EBTRB = 11 WRT0, EBTR0 = 01 WRT1, EBTR1 = 11 WRT2, EBTR2 = 11 WRT3, EBTR3 = 11 TBLWT* TBLPTR = 0008FFh PC = 003FFEh TBLWT* PC = 00BFFEh Register Values Program Memory Configuration Bit Settings Results: All table writes disabled to Blockn whenever WRTn = 0. 010000h 013FFFh 014000h 017FFFh WRT4, EBTR3 = 11 WRT5, EBTR3 = 11 TBLRD* TBLPTR = 0008FFh PC = 007FFEh Results: All table reads from external blocks to Blockn are disabled whenever EBTRn = 0. TABLAT register returns a value of ‘0’. Register Values Program Memory Configuration Bit Settings 000000h 0007FFh 000800h 003FFFh 004000h 007FFFh 008000h 00BFFFh 00C000h 00FFFFh WRTB, EBTRB = 11 WRT0, EBTR0 = 01 WRT1, EBTR1 = 11 WRT2, EBTR2 = 11 WRT3, EBTR3 = 11 010000h 013FFFh 014000h 017FFFh WRT4, EBTR3 = 11 WRT5, EBTR3 = 11 |
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