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ST72324BK Datasheet(PDF) 125 Page - STMicroelectronics

Part # ST72324BK
Description  8-bit MCU, 3.8 to 5.5 V operating range with 8 to 32 Kbyte Flash/ROM, 10-bit ADC, 4 timers, SPI, SCI
PDF  188 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72324BK Datasheet(HTML) 125 Page - STMicroelectronics

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ST72324B
On-chip peripherals
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Changing the conversion channel
The application can change channels during conversion. When software modifies the
CH[3:0] bits in the ADCCSR register, the current conversion is stopped, the EOC bit is
cleared, and the A/D converter starts converting the newly selected channel.
10.6.4
Low power modes
Note:
The A/D converter may be disabled by resetting the ADON bit. This feature allows reduced
power consumption when no conversion is needed.
.
10.6.5
Interrupts
None.
10.6.6
ADC registers
ADC Control/Status Register (ADCCSR)
Table 69.
Effect of low power modes on ADC
Mode
Description
Wait
No effect on A/D converter
Halt
A/D converter disabled.
After wake-up from Halt mode, the A/D converter requires a stabilization time tSTAB
(see Section 12: Electrical characteristics) before accurate conversions can be
performed.
ADCCSR
Reset value: 0000 0000 (00h)
7
654
32
10
EOC
SPEED
ADON
Reserved
CH[3:0]
RO
R/W
RW
-
RW
Table 70.
ADCCSR register description
Bit
Name
Function
7EOC
End of Conversion
This bit is set by hardware. It is cleared by hardware when software reads the
ADCDRH register or writes to any bit of the ADCCSR register.
0: Conversion is not complete
1: Conversion complete
6
SPEED
ADC clock selection
This bit is set and cleared by software.
0: fADC = fCPU/4
1: fADC = fCPU/2
5ADON
A/D Converter on
This bit is set and cleared by software.
0: Disable ADC and stop conversion
1: Enable ADC and start conversion



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