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PIC18F6X2X Datasheet(PDF) 77 Page - Microchip Technology |
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PIC18F6X2X Datasheet(HTML) 77 Page - Microchip Technology |
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77 / 386 page ![]() 2003 Microchip Technology Inc. Advance Information DS39612A-page 75 PIC18F6X2X/8X2X 6.2 16-bit Mode The external memory interface implemented in PIC18F8X2X devices operates only in 16-bit mode. The mode selection is not software configurable but is programmed via the configuration bits. The WM1:WM0 bits in the MEMCON register deter- mine three types of connections in 16-bit mode. They are referred to as: • 16-bit Byte Write • 16-bit Word Write • 16-bit Byte Select These three different configurations allow the designer maximum flexibility in using 8-bit and 16-bit memory devices. For all 16-bit modes, the Address Latch Enable (ALE) pin indicates that the address bits A15:A0 are available on the external memory interface bus. Following the address latch, the Output Enable signal (OE) will enable both bytes of program memory at once to form a 16-bit instruction word. The Chip Enable signal (CE) is active at any time that the microcontroller accesses external memory, whether reading or writing; it is inac- tive (asserted high) whenever the device is in SLEEP mode. In Byte Select mode, JEDEC standard FLASH memo- ries will require BA0 for the byte address line and one I/O line, to select between Byte and Word mode. The other 16-bit modes do not need BA0. JEDEC standard static RAM memories will use the UB or LB signals for byte selection. 6.2.1 16-BIT BYTE WRITE MODE Figure 6-1 shows an example of 16-bit Byte Write mode for PIC18F8X2X devices. This mode is used for two separate 8-bit memories connected for 16-bit oper- ation. This generally includes basic EPROM and FLASH devices. It allows table writes to byte-wide external memories. During a TBLWT instruction cycle, the TABLAT data is presented on the upper and lower bytes of the AD15:AD0 bus. The appropriate WRH or WRL control line is strobed on the LSb of the TBLPTR. FIGURE 6-1: 16-BIT BYTE WRITE MODE EXAMPLE AD<7:0> A<19:16> ALE D<15:8> 373 A<x:0> D<7:0> A<19:0> A<x:0> D<7:0> 373 OE WRH OE OE WR(1) WR(1) CE CE Note 1: This signal only applies to table writes. See Section 5.1, “Table Reads and Writes”. WRL D<7:0> (LSB) (MSB) PIC18F8X2X D<7:0> AD<15:8> Address Bus Data Bus Control Lines CE |
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