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UPSD3422 Datasheet(PDF) 228 Page - STMicroelectronics |
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UPSD3422 Datasheet(HTML) 228 Page - STMicroelectronics |
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228 / 293 page ![]() PSD module uPSD34xx 228/293 28.5.37 MCU I/O mode In MCU I/O mode, the 8032 on the MCU Module expands its own I/O by using the I/O Ports on the PSD Module. The 8032 can read PSD Module I/O pins, set the direction of the I/O pins, and change the output state of I/O pins by accessing the Data In, Direction, and Data Out csiop registers respectively at run-time. To implement MCU I/O mode, each desired pin is specified in PSDsoft Express as MCU I/O function and given a pin name. Then 8032 firmware is written to set the Direction bit for each corresponding pin during initialization routines (0 = In, 1 = Out of the chip), then the 8032 firmware simply reads the corresponding Data In register to determine the state of an I/O pin, or writes to a Data Out register to set the state of a pin. The Direction of each pin may be changed dynamically by the 8032 if desired. A mixture of input and output pins within a single port is allowed. Figure 80 on page 226 shows the Data In, Data Out, and Direction signal paths. The Data In registers are defined in Table 122 to Table 125. The Data Out registers are defined in Table 126 to Table 129 on page 229. The Direction registers are defined in Table 130 to Table 133 on page 230. Table 122. MCU I/O mode port A data in register(1) (address = csiop + offset 00h) Note: 1 Port A not available on 52-pin uPSD34xx devices 2 For each bit, 1 = current state of input pin is logic '1,' 0 = current state is logic ’0’ Table 123. MCU I/O mode port B data in register (address = csiop + offset 01h) Note: For each bit, 1 = current state of input pin is logic '1,' 0 = current state is logic ’0’ Table 124. MCU I/O mode port C data in register (address = csiop + offset 10h) Note: 1 X = Not guaranteed value, can be read either '1' or '0.' 2 For each bit, 1 = current state of input pin is logic '1,' 0 = current state is logic ’0’ Table 125. MCU I/O mode port D Data in register (address = csiop + offset 11h) Note: 1 X = Not guaranteed value, can be read either '1' or '0.' 2 For each bit, 1 = current state of input pin is logic '1,' 0 = current state is logic ’0’ 3 Not available on 52-pin uPSD34xx devices Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2 Bit 1Bit 0 PC7 X X PC4 PC3 PC2 X X Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 XX XX X PD2(3) PD1 X |
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