UPSD3422 datasheet(229/293 Pages) STMICROELECTRONICS

229 / 293 page

uPSD34xx

PSD module

229/293

Table 126.

MCU I/O mode port A data out register(1) (address = csiop + offset 04h)

Note:

Port A not available on 52-pin uPSD34xx devices

For each bit, 1 = drive port pin to logic '1,' 0 = drive port pin to logic ’0’

Default state of register is 00h after reset or power-up

Table 127.

MCU I/O mode port B data out register (address = csiop + offset 05h)

Note:

For each bit, 1 = drive port pin to logic '1,' 0 = drive port pin to logic ’0’

Default state of register is 00h after reset or power-up

Table 128.

MCU I/O mode port C data out register (address = csiop + offset 12h)

Note:

For each bit, 1 = drive port pin to logic '1,' 0 = drive port pin to logic ’0’

Default state of register is 00h after reset or power-up

Table 129.

MCU I/O mode port D data out register (address = csiop + offset 13h)

Note:

For each bit, 1 = drive port pin to logic '1,' 0 = drive port pin to logic ’0’

Default state for register is 00h after reset or power-up

Not available on 52-pin uPSD34xx devices

Table 130.

MCU I/O mode port A direction register(1) (address = csiop + offset 06h)

Note:

Port A not available on 52-pin uPSD34xx devices

For each bit, 1 = out from uPSD34xx port pin1, 0 = in to PSD34xx port pin

Default state for register is 00h after reset or power-up

Table 131.

MCU I/O mode port B direction in register (address = csiop + offset 07h)

Note:

For each bit, 1 = out from uPSD34xx port pin1, 0 = in to PSD34xx port pin

Default state for register is 00h after reset or power-up

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PA7

PA6

PA5

PA4

PA3

PA2

PA1

PA0

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PB7

PB6

PB5

PB4

PB3

PB2

PB1

PB0

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PC7

N/A

PC4

PC3

PC2

N/A

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

N/A

PD2(3)

PD1

N/A

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PA7

PA6

PA5

PA4

PA3

PA2

PA1

PA0

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PB7

PB6

PB5

PB4

PB3

PB2

PB1

PB0

UPSD3422 Datasheet(PDF) 229 Page - STMicroelectronics

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