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UPSD3422 Datasheet(PDF) 276 Page - STMicroelectronics

Part # UPSD3422
Description  Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic
PDF  293 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UPSD3422 Datasheet(HTML) 276 Page - STMicroelectronics

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DC and AC parameters
uPSD34xx
276/293
Table 170.
CPLD macrocell asynchronous clock mode timing (3V PSD module)
Figure 105. Input macrocell timing (product term clock)
Table 171.
Input macrocell timing (5V PSD module)
Note:
1
Inputs from Port A, B, and C relative to register/ latch clock from the PLD. ALE/AS latch
timings refer to tAVLX and tLXAX.
Symbol
Parameter
Conditions
Min
Max
PT
Aloc
Turbo
Off
Slew
Rate
Unit
fMAXA
Maximum Frequency
External Feedback
1/(tSA+tCOA)
21.7
MHz
Maximum Frequency
Internal Feedback
(fCNTA)
1/(tSA+tCOA–
10)
27.8
MHz
Maximum Frequency
Pipelined Data
1/(tCHA+tCLA)
33.3
MHz
tSA
Input Setup Time
10
+ 4
+ 15
ns
tHA
Input Hold Time
12
ns
tCHA
Clock High Time
17
+ 15
ns
tCLA
Clock Low Time
13
+ 15
ns
tCOA
Clock to Output Delay
31
+ 15
– 6
ns
tARD
CPLD Array Delay
Any macrocell
20
+ 4
ns
tMINA
Minimum Clock Period
1/fCNTA
36
ns
Symbol
Parameter
Condition
s
Min
Max
PT
Aloc
Turbo
Off
Unit
tIS
Input Setup Time
(Note 1)
0
ns
tIH
Input Hold Time
(Note 1)
15
+ 10
ns
tINH
NIB Input High Time
(Note 1)
9
ns
tINL
NIB Input Low Time
(Note 1)
9
ns
tINO
NIB Input to Combinatorial
Delay
(Note 1)
34
+ 2
+ 10
ns
tINH
tINL
tINO
tIH
tIS
PT CLOCK
INPUT
OUTPUT
AI03101



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