TMP88CS38 datasheet(56/226 Pages) TOSHIBA

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TMP88CS38/CM38A/CP38A

2007-09-12

88CS38-56

2.4

Watchdog Timer (WDT)

The watchdog timer is a fail-safe system to rapidly detect the CPU malfunctions such as

endless looping caused by noise or the like, or deadlock and resume the CPU to the normal

state.

The watchdog timer signal for detecting malfunction can be selected either a reset output or a

pseudo non-maskable interrupt request. However, selection is possible only once after reset. At

first the reset output is selected.

When the watchdog timer is not being used for malfunction detection, it can be used as a

timer to generate an interrupt at fixed intervals.

Note:

Care must be given in system design so as to protect the watchdog timer from disturbing

noise. Otherwise the watchdog timer may not fully exhibit its functionality.

2.4.1

Watchdog Timer Configuration

Figure 2.4.1 Watchdog Timer Configuration

fc/2

23, fc/224

fc/2

21, fc/222

fc/2

19, fc/220

fc/2

17, fc/218

Binary counters

Clock

Clear

Overflow

WDT output

Reset release signal from T.G.

Reset output

Internal reset

WDTT

WDTEN

Interrupt request

RESET

INTWDT

Writing

disable code

Writing

clear code

WDTOUT

Controller

WDTCR1

00034H

WDTCR2

00035H

Watchdog timer control registers

MPX

MPX: Multiplexer

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