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TMP88CS38 Datasheet(PDF) 90 Page - Toshiba Semiconductor

Part # TMP88CS38
Description  8-bit single chip microcomputer
PDF  226 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP88CS38 Datasheet(HTML) 90 Page - Toshiba Semiconductor

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TMP88CS38/CM38A/CP38A
2007-09-12
88CS38-90
Serial Bus Interface Control Register B
7
6
5
4
3
2
1
0
SBICRB
(00023H)
MST
TRX
BB
PIN
SBIM
SWRST1SWRST0
(Initial value: 0001 0000)
MST
Master/slave selection
0: Slave
1: Master
TRX
Transmitter/receiver selection
0: Receiver
1: Transmitter
BB
Start/stop generation
0: Generate a stop condition when MST, TRX and PIN are “1”.
1: Generate a start condition when MST, TRX and PIN are “1”.
PIN
Cancel interrupt service request
0:
−
1: Cancel interrupt service request
SBIM
Serial bus interface operating
mode selection
00: Port mode (Serial bus interface output disable)
01: Clocked synchronous 8-bit SIO mode
10: I
2C bus mode
11: Reserved
SWRST1
SWRST0
Software reset start bit
Software reset starts by first writing “10” and next writing “01”.
Write
only
Note 1:
Switch a mode to port after confirming that the bus is free.
Note 2:
Switch a mode to I
2C bus mode or clock synchronous 8-bit SIO mode after confirming that the port is high
level.
Note 3:
SBICRB has write-only register and must not be used with any of read-modify-write instructions such as bit
manipulation, etc.
Note 4:
When the SWRST (Bit1, 0 in SBICRB) is written to “01”, “10”, software reset (Four machine cycles) is
occurred.
This time, control the serial bus interface and monitor the operation status registers except the SBIM (Bit3,
2 in SBICRB) and the CHS (Bit6 in PMPXCR) are reseted.
Control the serial bus interface and monitor the operation status registers are SBICRA, SBICRB, SBIDBR,
I2CAR, SBISRA, SBISRB, SCCRA and SCSR.
Serial Bus Interface Status Register A
7
6
5
4
3
2
1
0
SBISRA
(00020H)
ACK
SWR
MON
(Initial value: **** ***1)
SWRMON
Software reset monitor
0: During software reset
1:
− (Initial)
Read
only
*: Don’t care
Serial Bus Interface Status Register B
7
6
5
4
3
2
1
0
SBISRB
(00023H)
MST
TRX
BB
PIN
AL
AAS
AD0
LRB
(Initial value: 0001 0000)
MST
Master/slave selection status
monitor
0: Slave
1: Master
TRX
Transmitter/receiver selection
status monitor
0: Receiver
1: Transmitter
BB
Bus status monitor
0: Bus free
1: Bus busy
PIN
Interrupt service requests
status monitor
0: Requesting interrupt service
1: Releasing interrupt service request
AL
Arbitration lost detection
monitor
0:
−
1: Arbitration lost detected
AAS
Slave address match detection
monitor
0: Not detect slave address match or “GENERAL CALL”
1: Detect slave address match or “GENERAL CALL”
AD0
“GENERAL CALL” detection
monitor
0: Not detect “GENERAL CALL”
1: Detect “GENERAL CALL”
LRB
Last Received bit monitor
0: Last receive bit is “0”
1: Last receive bit is “1”
Read
only
Figure 2.9.6 Serial Bus Interface Control Register B and Serial Bus Interface
Status Register A/B in the I
2C Bus Mode



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