TMP88CS38 datasheet(65/226 Pages) TOSHIBA

65 / 226 page

TMP88CS38/CM38A/CP38A

2007-09-12

88CS38-65

Figure 2.5.4 External Trigger Timer Mode Timing Chart

(3) Event counter mode

In this mode, events are counted at the edge of the TC1 pin input (Either the rising

or falling edge can be selected with the external trigger TC1CR<TC1S>). The contents

of TC1DRA are compared with the contents of up counter. If a match is found, an

INTTC1 interrupt is generated, and the counter is cleared.

Match detect is executed on other edge of count-up. A match can not be detected and

INTTC1 is not generated when the pulse is still in same state.

Setting ACAP1 to “1” transfers the current contents of up counter to TC1DRB

(Auto-capture function).

Figure 2.5.5 Event Counter Mode Timing Chart

Table 2.5.2 Input Pulse Width for Timer/Counter 1

Minimum Pulse Width [s]

NORMAL/IDLE

“H” Width

3/fc

“L” Width

3/fc

− 1 n

TC1DRA

INTTC1

interrupt

Count start

Internal clock

Up counter

Match detect

Counter clear

(a) Trigger start (METT1

= 0)

Count start

TC1S

= 10 at the

rising edge

TC1 pin input

− 1 n

TC1DRA

INTTC1

interrupt

Count start

Internal clock

Up counter

Match detect

Counter clear

(b) Trigger start and stop (METT1

= 1)

Count start

TC1S

= 10

at the rising

edge

TC1 pin input

− 1

Counter clear

< n

INTTC1 interrupt

Up counter

TC1 pin input

TC1DRA

TC1S

= 10

at the falling

edge

− 1

Count start

Match detect

Counter clear

TMP88CS38 Datasheet(PDF) 65 Page - Toshiba Semiconductor

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