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AX88780 Datasheet(PDF) 22 Page - ASIX Electronics Corporation |
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AX88780 Datasheet(HTML) 22 Page - ASIX Electronics Corporation |
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22 / 55 page  AX88780 22 ASIX ELECTRONICS CORPORATION 4.8 TXDES0--TX Descriptor0 Register Offset Address = 0xFC20 Default = 0x0000_0000 Field Name Type Default Description 31:16 - R All 0’s Reserved 15 TXD0_EN R/W 0 Transmit TX descriptor 0 If this bit is enabled, MAC will begin to transmit data that are stored in TX buffer. In former, data had been written to TX descriptor0. This bit will be cleared by hardware when MAC finished the transmission. 1= enable 0= disable 14:13 - R 00 Reserved 12:0 TXD0_LEN R/W All 0’s TX packet length (unit: byte) Driver set this field to indicate AX88780 how many bytes will be transmitted. 4.9 TXDES1--TX Descriptor1 Register Offset Address = 0xFC24 Default = 0x0000_0000 Field Name Type Default Description 31:16 - R All 0’s Reserved 15 TXD1_EN R/W 0 Transmit TX descriptor 1 If this bit is enabled, MAC will begin to transmit data that are stored in TX buffer. In former, data had been written to TX descriptor1. This bit will be cleared by hardware when MAC finished the transmission. 1= enable 0= disable 14:13 - R 00 Reserved 12:0 TXD1_LEN R/W All 0’s TX packet length (unit: byte) Driver set this field to indicate AX88780 how many bytes will be transmitted. 4.10 TXDES2--TX Descriptor2 Register Offset Address = 0xFC28 Default = 0x0000_0000 Field Name Type Default Description 31:16 - R All 0’s Reserved 15 TXD2_EN R/W 0 Transmit TX descriptor 2 If this bit is enabled, MAC will begin to transmit data that are stored in TX buffer. In former, data had been written to TX descriptor2. This bit will be cleared by hardware when MAC finished the transmission. 1= enable 0= disable 14:13 - R 00 Reserved 12:0 TXD2_LEN R/W All 0’s TX packet length (unit: byte) Driver set this field to indicate AX88780 how many bytes will be transmitted. |
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