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ES9016K2M Datasheet(PDF) 6 Page - ESS Technology,Inc

Part # ES9016K2M
Description  Ultra 32-bit Stereo Low Power Audio DAC
PDF  38 Pages
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Manufacturer  ESS [ESS Technology,Inc]
Direct Link  http://www.esstech.com
Logo ESS - ESS Technology,Inc

ES9016K2M Datasheet(HTML) 6 Page - ESS Technology,Inc

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3.2
March 26, 2021
ES9016K2M Datasheet
ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-
8800 • www.esstech.com
6
FEATURE DESCRIPTION
Soft Mute
When Mute is asserted the output signal will ramp to the -
 level. When Mute is reset the attenuation level will ramp back up
to the previous level set by the volume control register. Asserting Mute will not change the value of the volume control
register. The ramp rate is 0.0078125 x fs / 2(vol_rate-5) dB/s.
Automute
During an automute condition the ramping of the volume of each DAC to -
 can now be programmatically enabled or
disabled.
o
In PCM serial mode, “AUTOMUTE” will become active once the audio data is continuously below the threshold set by
<Register Automute_lev>, for a length of time defined by 2096896 / (<Register#4> x 64 x fs) seconds.
o
In SPDIF mode, “AUTOMUTE” will become active once the audio data is continuously below the threshold set by
<Register Automute_lev>, for a length of time defined by 2096896 / (<Register#4> x (64 x fs) seconds.
o
In the DSD Mode, “AUTOMUTE” will become active when any 8 consecutive values in the DSD stream have as many 1’s
and 0’s for a length of time defined by 2096896 / (<Register Automute_time> x DATA_CLK) seconds. The following
table summarizes the conditions.
Mode
Detection Condition
Time
PCM
Data is continuously lower than
<Register Automute_lev >
2096896 / (<Register Automute_time > x 64 x fs)
SPDIF
Data is continuously lower than
<Register Automute_lev >
2096896 / (<Register Automute_time > x (64 x fs))
DSD
Equal number of 1s and 0s in every 8
bits of data
2096896 / (<Register Automute_time > x DATA_CLK)
Volume Control
Each output channel has its own attenuation circuit. The attenuation for each channel is controlled independently. Each
channel can be attenuated from 0dB to
–127dB in 0.5dB steps.
Each 0.5dB step transition takes up to 64 intermediate levels, depending on the vol_rate register setting. The result being
that the level changes are done using small enough steps so that no switching noise occurs during the transition of the
volume control. When a new volume level is set, the attenuation circuit will ramp softly to the new level.
Master Trim
The master trim sets the 0dB reference level for the volume control of each DAC. The master trim is programmable via
registers 17-20 and is a 32bit signed number. Therefore it should never exceed 32'h7FFFFFFF (as this is full-scale signed).
All Mono Mode
An all mono mode where all DACs are driven from the same source is supported. This can be useful for high-end audio
applications. The source data for all DACs can be programmatically configured to be either CH1 or CH2.
De-emphasis
The de-emphasis feature is included for audio data that has utilized the 50/15
s pre-emphasis for noise reduction. There are
three de-emphasis filters, one for 32kHz, one for 44.1kHz, and one for 48kHz.
SPDIF Data Select
An SPDIF source multiplexer allows for up to four SPDIF sources to be connected to the data pins. An internal
programmable register (spdif_sel) is used to select the appropriate data or GPIO pin to decode. SPDIF can also be sourced
from GPIO pin configured as input.



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