LMH2191

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SNAS485D – JULY 2010 – REVISED MAY 2013

3.5 V ELECTRICAL CHARACTERISTICS

(1) (continued)

Unless otherwise specified, all limits are specified at TJ = 25°C, VBAT = 3.5V, CBAT = 1µF, COUT = 2.2 µF

(2), f

SCLK_IN = 26 MHz,

IOUT = 1mA, Boldface limits apply at the temperature extremes.

Symbol

Parameter

Condition

Min(3)

Typ(4)

Max(3)

Units

Clock Request Inputs (CLK_REQ1/2)

tSET

Setup Time from CLK_REQx to

SCLK_IN, to enable CLKx

12

6.2

ns

(Figure 3)

VIH

CLK_REQ1/2 logic HIGH input

VBAT = 2.5V

1.4

level. (clock output = ON)(9)

VBAT = 3.5V

1.4

V

VBAT = 5.5V

1.4

VIL

CLK_REQ1/2 logic LOW input

VBAT = 2.5V

0.4

level. (clock output = OFF)

VBAT = 3.5V

0.4

V

VBAT = 5.5V

0.4

IIH

Current into CLK_REQ pin

VIH = 1.8V, 200 kΩ pull down resistor

8.5

14

µA

(Input HIGH)

IIL

Current into CLK_REQ pin

VIL = VSS, (Input LOW)

-0.2

0

µA

LDO

VOUT

Output Voltage

IOUT = 1mA

1.73

1.8

1.88

V

ILOAD

Load Current(10)

VOUT > 1.7V

0

10

mA

VDO

Dropout Voltage(11)

IOUT = 10 mA Vout=1.7V

125

mV

ISC

Short Circuit Current Limit

300

mA

PSRR

Power Supply Rejection Ratio

VBAT ripple = 200 mVPP, f = 100 Hz

92

IOUT = 10 mA

f = 217.5 Hz

90

f = 1 kHz

78

f = 10 kHz

60

dB

f = 100 kHz

50

f = 1 MHz

50

f = 3.25 MHz

42

EN

Output Noise Voltage(12)

BW = 10 Hz to 100 kHz,

CLK_REQ1/2=High, Input clock not

18

µVRMS

active

TSHTDWN

Thermal Shutdown

Temperature

160

°C

Hysteresis

20

ΔVOUT

Line Transient

VBAT = 2.8V to 3.4V in 30 µs, IOUT =

-1

1mA

mV

VBAT = 3.4V to 2.8V in 30 µs, IOUT =

1

1mA

Load Transient

IOUT = 0mA to 10 mA in 10 µs

-15

mV

IOUT = 10 mA to 0mA in 10 µs

10

Overshoot on Startup

20

mV

ROUT

DC Output Resistance

5

Ω

TON

Turn on Time

From rising edge of CLK_REQ1 to 95%

260

200

µs

of VOUT(NOM)

350

(9)

Clock Request Inputs can tolerate logic high input levels up to VBAT.

(10) The device maintains stable, regulated output voltage without a load.

(11) Dropout voltage is the voltage difference between the input and the output at which the output voltage drops to 100 mV below its

nominal value.

(12) The noise figure is the noise of the LDO only; harmonics of the output clocks are excluded.

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