PCM1808

www.ti.com

SLES177B – APRIL 2006 – REVISED AUGUST 2015

6.4 Thermal Information

PCM1808

THERMAL METRIC(1)

PW (TSSOP)

UNIT

14 PINS

RθJA

Junction-to-ambient thermal resistance

89.4

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

25.6

°C/W

RθJB

Junction-to-board thermal resistance

30.3

°C/W

ψJT

Junction-to-top characterization parameter

1.4

°C/W

ψJB

Junction-to-board characterization parameter

29.8

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

N/A

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

6.5 Electrical Characteristics

All specifications at TA = 25°C, VCC = 5 V, VDD = 3.3 V, master mode, fS = 48 kHz, system clock = 512 fS, 24-bit data, unless

otherwise noted

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Resolution

24

Bits

DATA FORMAT

Audio data interface format

I2S, left-justified

Audio data bit length

24

Bits

Audio data format

MSB-first, 2s complement

fS

Sampling frequency

8

48

96

kHz

256 fS

2.048

12.288

24.576

System clock frequency

384 fS

3.072

18.432

36.864

MHz

512 fS

4.096

24.576

49.152

INPUT LOGIC

VIH

(1)

High input logic level

2

VDD

VDC

VIL

(1)

Low input logic level

0

0.8

VDC

VIH

(2) (3)

High input logic level

2

5.5

VDC

VIL

(2) (3)

Low input logic level

0

0.8

VDC

IIH

(2)

High input logic current

VIN = VDD

±10

µA

IIL

(2)

Low input logic current

VIN = 0 V

±10

µA

IIH

(1) (3)

High input logic current

VIN = VDD

65

100

µA

IIL

(1) (3)

Low input logic current

VIN = 0 V

±10

µA

OUTPUT LOGIC

VOH

(4)

High output logic level

IOUT = –4 mA

2.8

VDC

VOL

(4)

Low output logic level

IOUT = 4 mA

0.5

VDC

DC ACCURACY

% of

Gain mismatch, channel-to-channel

±1

±3

FSR

% of

Gain error

±3

±6

FSR

(1)

Pins 7, 8: LRCK, BCK (Schmitt-trigger input, with 50-k

Ω typical pulldown resistor, in slave mode)

(2)

Pin 6: SCKI (Schmitt-trigger input, 5-V tolerant)

(3)

Pins 10–12: MD0, MD1, FMT (Schmitt-trigger input, with 50-k

Ω typical pulldown resistor, 5-V tolerant)

(4)

Pins 7–9: LRCK, BCK (in master mode), DOUT

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