PCM1808-Q1

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SLES265A – MARCH 2011 – REVISED AUGUST 2012

REVISION HISTORY

Changes from Original (March, 2011) to Revision A

Page

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ROC CHANGES: Added 2.93 min and 3.23 max to analog input voltage row .................................................................... 2

•

ELEC CHAR CHANGES: Added -40°C

≤ TA ≤ 125°C to the header for DC accuracy and the rows for system clock

frequency, input logic level, and output logic level ............................................................................................................... 3

•

Added test condition row to VIN = VDD (input logic current) at -40°C ≤ TA ≤ 125°C with typ value 65 and max value

150 ........................................................................................................................................................................................ 3

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Added test condition row to IOUT = –4 mA (output logic level) at -40°C ≤ TA ≤ 125°C with a min value of 2.7; added

test condition of 25°C with min value of 2.8 ......................................................................................................................... 3

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Added test condition of 25°C to VIN = –0.5 dB, fS = 48 kHz (THD + N) with max value of –87, and added row with

test condition of -40°C

≤ TA ≤ 125°C and max value –85 ..................................................................................................... 3

•

Added test condition 25°C and min value of 95; added test condition row for -40°C

≤ TA ≤ 125°C with min value of

93 to fS = 48 kHz, A-weighted row (dynamic range and signal-to-noise) ............................................................................. 3

•

Added test condition 25°C and min value of 93; added test condition row for -40°C

≤ TA ≤ 125°C with min value of

91 to fS = 48 kHz (channel separation) ................................................................................................................................. 4

•

Added min value 0.58 VCC and max value 0.65 VCC to input voltage; added 0.2 VCC min and 0.8 VCC max to center

voltage; changed center voltage Vref to center voltage input range .................................................................................... 4

•

Added -40°C

≤ TA ≤ 125°C to input voltage, center voltage, digital filter performance header, supply current, and

voltage range rows ............................................................................................................................................................... 4

•

Added test condition row with -40°C

≤ TA ≤ 125°C to fS = 48 kHz (supply current) with a typ value of 5.9 and a max

value of 10 ............................................................................................................................................................................ 4

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