PCM1808-Q1

SLES265A – MARCH 2011 – REVISED AUGUST 2012

www.ti.com

ELECTRICAL CHARACTERISTICS (continued)

All specifications at TA = 25°C, VCC = 5 V, VDD = 3.3 V, master mode, fS = 48 kHz, system clock = 512 fS, 24-bit data, unless

otherwise noted

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

at 25°C

93

97

fS = 48 kHz

Channel separation

–40°C

≤ TA ≤ 125°C

91

97

dB

fS = 96 kHz

(8)

91

ANALOG INPUT

Input voltage,

0.58 VCC

0.6 VCC 0.65 VCC

Vp-p

–40°C

≤ TA ≤ 125°C

Center voltage input range,

0.2 VCC

0.5 VCC

0.8 VCC

V

–40°C

≤ TA ≤ 125°C

Input impedance

60

k

Ω

Antialiasing filter frequency

–3 dB

1.3

MHz

response

DIGITAL FILTER PERFORMANCE, –40°C

≤ TA ≤ 125°C

(3)

Pass band

0.454 fS

Hz

Stop band

0.583 fS

Hz

Pass-band ripple

±0.05

dB

Stop-band attenuation

–65

dB

Delay time

17.4/fS

0.019

HPF frequency response

–3 dB

fS/1000

POWER SUPPLY REQUIREMENTS

VCC

4.5

5

5.5

Voltage range,

VDC

–40°C

≤ TA ≤ 125°C

VDD

2.7

3.3

3.6

fS = 48 kHz, 96 kHz, –40°C ≤ TA ≤ 125°C

(10)

8.6

11

mA

ICC

Powered down (11)

1

μA

at 25°C

5.9

8

Supply current (9)

fS = 48 kHz

mA

–40°C

≤ TA ≤ 125°C

5.9

10

IDD

fS = 96 kHz

(10)

10.2

mA

Powered down (11)

150

μA

fS = 48 kHz

62

81

mW

Power dissipation (9)

fS = 96 kHz

(10)

77

Powered down (11)

500

μW

TEMPERATURE RANGE

TA

Operation temperature

–40

125

°C

θJA

Thermal resistance

170

°C/W

(9)

Minimum load on LRCK (pin 7), BCK (pin 8), DOUT (pin 9)

(10) fS = 96 kHz, system clock = 256 fS.

(11) Power-down and reset functions enabled by halting SCKI, BCK, LRCK.

4

Copyright © 2011–2012, Texas Instruments Incorporated