SCKI

0.8 V

SCKI

2 V

tw(SCKL)

tw(SCKH)

T0005B07

PCM1808-Q1

www.ti.com

SLES265A – MARCH 2011 – REVISED AUGUST 2012

SYSTEM CLOCK

The PCM1808-Q1 supports 256 fS, 384 fS and 512 fS as system clock, where fS is the audio sampling frequency.

The system clock must be supplied on SCKI (pin 6).

The PCM1808-Q1 has a system clock detection circuit which automatically senses if the system clock is

operating at 256 fS, 384 fS, or 512 fS in slave mode. In master mode, the system clock frequency must be

controlled through the serial control port, which uses MD1 (pin 111) and MD0 (pin 10). The system clock is

divided down automatically to generate frequencies of 128 fS and 64 fS, which are used to operate the digital filter

and the delta-sigma modulator, respectively.

Table 1 shows some typical relationships between sampling frequency and system clock frequency, and

Figure 17 shows system clock timing.

Table 1. Sampling Frequency and System Clock Frequency

SAMPLING FREQUENCY (kHz)

SYSTEM CLOCK FREQUENCY (fSCLK) (MHz)

256 fS

384 fS

512 fS

8

2.048

3.072

4.096

16

4.096

6.144

8.192

32

8.192

12.288

16.384

44.1

11.2896

16.9344

22.5792

48

12.288

18.432

24.576

64

16.384

24.576

32.768

88.2

22.5792

33.8688

45.1584

96

24.576

36.864

49.152

SYMBOL

PARAMETER

MIN

MAX

UNIT

tw(SCKH)

System clock pulse duration, HIGH

8

ns

tw(SCKL)

System clock pulse duration, LOW

8

ns

System clock duty cycle

40%

60%

Figure 17. System Clock Timing

FADE-IN AND FADE-OUT FUNCTIONS

The PCM1808-Q1 has fade-in and fade-out functions on DOUT (pin 9) to avoid pop noise, and the functions

come into operation in some cases as described in several following sections. The level changes from 0 dB to

mute or mute to 0 dB are performed using calculated pseudo S-shaped characteristics with zero-cross detection.

Because of the zero-cross detection, the time needed for the fade in and fade out depends on the analog input

frequency (fin). It takes 48/fin until processing is completed. If there is no zero cross during 8192/fS, DOUT is

faded in or out by force during 48/fS (TIME OUT). Figure 18 illustrates the fade-in and fade-out operation

processing.

Copyright © 2011–2012, Texas Instruments Incorporated

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