XC9504B092DAL datasheet(8/53 Pages) TOREX

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XC9504 Series

■OPERATIONAL EXPLANATION

The XC9504 series are dual DC/DC (step-up + inverting) converter controller ICs with built-in high speed, low ON resistance

buffers.

Error amplifier 1 is designed to monitor the output voltage and it compares the feedback voltage1 (FB1) with the reference

voltage Vref1.

In response to feedback of a voltage lower than the reference voltage Vref1, the output voltage of the error

amp. decreases

Error amplifier 2 is designed to monitor the output voltage and it compares the feedback voltage 2 (FB2) with the reference

voltage Vref 2.

In response to feedback of a voltage lower than the reference voltage Vref2, the output voltage of the error

amp. decreases.

This circuit generates the internal reference clock.

The ramp wave generator generates a saw-tooth waveform based on outputs from the OSC generator.

The PWM comparator compares outputs from the error amp. and saw-tooth waveform. When the voltage from the error

amp's output is low, the external will be set to ON.

This circuit generates PFM pulses.

Control can be switched between PWM control and PWM/PFM automatic switching control using external signals.

The PWM/PFM automatic switching mode is selected when the voltage of the PWM1 (2) pin is less than 0.2V, and the control

switches between PWM and PFM automatically depending on the load.

As the PFM circuit generates pulses based on

outputs from the PWM comparator, shifting between modes occurs smoothly.

PWM control mode is selected when the

voltage of the PWM1 (2) pin is more than 0.65V. Noise is easily reduced with PWM control since the oscillation frequency is

fixed. Control suited to the application can easily be selected which is useful in audio applications, for example, where

traditionally, efficiencies have been sacrificed during stand-by as a result of using PWM control (due to the noise problems

associated with the PFM mode in stand-by).

The reference voltage, Vref1 (FB1 pin voltage)=0.9V, is adjusted and fixed by laser trimming (for output voltage settings,

please refer to the functional settings notes below.). To protect against inrush current, when the power is switched on, and

also to protect against voltage overshoot, soft-start time is set internally to 10ms.

It should be noted, however, that this

circuit does not protect the load capacitor (CL) from inrush current. With the Vref voltage limited, and depending upon the

input to error amp 1, the operation maintains a balance between the two inputs of error amps and controls the EXT pin's ON

time so that it doesn't increase more than is necessary.

The reference voltage, Vref2 (FB2 pin voltage)=0.9V, is adjusted and fixed by laser trimming.

This function controls the operation and shutdown of the IC.

When the voltage of the EN1 or EN2 pins is 0.2V or less, the

mode will be disable, the channel's operations will stop and the EXT1 pin will be kept at a low level (the external N-ch

MOSFET will be OFF) and the EXT2 pin will be kept at a high level (the external P-ch MOSFET will be OFF). When both EN1

and EN2 are in a state of chip disable, current consumption will be no more than 3.0

μA.

When the EN1 or EN2 pin's voltage is 0.65V or more, the mode will be enable and operations will recommence.

With

channel one (output 1) soft-start, 95% of the set output voltage will be reached within 10msec (TYP.) from the moment of

enable.

XC9504B092DAL Datasheet(PDF) 8 Page - Torex Semiconductor

XC9504B092DAL Datasheet(HTML) 8 Page - Torex Semiconductor

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