TMS470MF06607 datasheet(37/65 Pages) TI2

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Wake up

CPU

8 MHz

OFF

Crystal-

Oscillator

with PLL

On-Chip

VREG

e.g., CAN

Module

Wake up

VREG

Update Status and Prepare

for Normal Operation

CPU

Ready for Normal Operation/CAN Message

TMS470MF06607

www.ti.com

SPNS157C

– JANUARY 2012

5.1.1

Sequence to Wake Up from Doze Mode

In doze mode, the HCLK, GCLK, VCLK, and VCLK2 are all turned off. Also, the main oscillator is the only

clock source running while in doze mode. For more details on the doze mode, see the TMS470M Series

Technical Reference Manual (SPNU495). Doze mode is not supported if the internal voltage regulator is

disabled.

The RTICLK is still active, which allows the RTI module to generate periodic wake up interrupts, if

required. The other wake-up options are: external interrupts via GIO pins, CAN message, and SCI/LIN.

The sequence for waking up from doze mode is described below:

1. Wake-up request is received/generated. Figure 5-3 shows the CAN module generating the wakeup

interrupt.

2. This wake-up event causes the core VREG to wake up.

3. Since the main oscillator is running already it is used as the clock source upon wake up.

4. The software runs using the main oscillator as the clock source. Also, the PLL can now be enabled.

5. Once the PLL has acquired LOCK, the software can switch over to using the PLL output clock for

normal operation.

Figure 5-3. Wake Up From Doze Mode

Peripheral Information and Electrical Specifications

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TMS470MF06607 Datasheet(PDF) 37 Page - Texas Instruments