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LM3550SPX/NOPB Datasheet(PDF) 14 Page - Texas Instruments |
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LM3550SPX/NOPB Datasheet(HTML) 14 Page - Texas Instruments |
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14 / 43 page ![]() 14 LM3550 SNVS569C – MAY 2009 – REVISED OCTOBER 2016 www.ti.com Product Folder Links: LM3550 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Feature Description (continued) 7.3.2 End-of-Charge Pin (EOC) The EOC pin provides an external flag alerting the microcontroller/microprocessor that the super-capacitor has reached the end of charging. When the super-capacitor has reached the desired end-of-charge level, the EOC pin transitions from its default state (logic 1) to the EOC state (logic 0). The EOC pin utilizes an open-drain driver that allows the EOC logic levels to be compatible with many of the common controller input/output (I/O) levels. Connecting a resistor between the system I/O supply and the EOC pin on the LM3550 ensures the proper voltage levels are utilized. The state of the EOC pin can change during a flash event, or any other event whenever the super-capacitor voltage drops below 95% of the target charge voltage. 7.3.3 ALD/TEMP Pin The ALD/TEMP pin allows the LM3550 to monitor the ambient light or ambient temperature and adjust the flash current through the LED/LEDs without requiring the microcontroller/microprocessor to issue commands through the control interface. For ambient light detection, a reverse-biased photosensor/diode and a resistor are required. For ambient temperature sensing, a negative temperature coefficient (NTC) thermistor and a resistor are required. Internal to the LM3550 are two comparators (based on a 1-V reference) connected to the ALD/TEMP pin that provide three user-selectable regions of flash current adjustment. The trip-point thresholds are selectable in the ALD/TEMP Sense High and Low Registers. If the ambient light or ambient temperature are sufficiently low (LM3550 in low region) the full-scale flash current is allowed. As the lighting conditions or temperature increase, the LM3550 ALD/TEMP detection circuit transitions to the second level that limits the flash current to 70% or the full-scale value. For conditions where a flash is not required (ambient detection) or if the ambient temperature is too high to flash safely, placing the ALD/TEMP circuit in the high-detection level, the LM3550 prevents a flash event from occurring. The functionality of the ALD/TEMP pin can be enabled or disabled through General Purpose Register (bit 6). These macro-functions, when enabled, off-load the microcontroller/microprocessor and provide significant system-power savings. To help filter out the 50 to 60 Hz noise caused by indoor lighting, TI recommends a 1-µF ceramic capacitor tied between the ALD/TEMP pin and GND. 7.3.4 IND Pin The Indicator pin (IND) consists of a current source that is capable of driving a red indicator LED with 5 mA of drive current. This indicator LED can be turned on and off by toggling bit 7 in the General Purpose Register. 7.3.5 BAL Pin The Balance pin (BAL), when connected to a super-capacitor (if needed), regulates the two sections of the super-capacitor so that voltage on either cell is equal to ½ the output voltage. This ensures that an overvoltage condition on either capacitor section does not occur. 7.3.6 Super-Capacitor Charging Time The time it takes the LM3550 to charge a super-capacitor from 0 V to the target voltage is highly dependent on the input voltage, output-voltage target, and super-capacitor capacitance value. • The LM3550 up a capacitor faster if the target output voltage is lower and slower if the target output voltage is higher. For a given charge profile, a up a capacitor faster with higher input voltage and slower with lower input voltages. This is due to the LM3550 staying in the lower gains for longer periods of time. • The LM3550 charges up a capacitor faster if the target output voltage is lower and slower if the target output voltage is higher. For a given charge profile, a lower capacitor voltage is reached faster than a higher voltage level. • The LM3550 charges up a capacitor having a lower capacitance value faster than a capacitor having a higher capacitance level. |
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