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LMH0318RTWR Datasheet(PDF) 39 Page - Texas Instruments |
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LMH0318RTWR Datasheet(HTML) 39 Page - Texas Instruments |
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39 / 59 page ![]() LMH0318 www.ti.com SNLS508 – SEPTEMBER 2015 Table 7. CDR Registers (continued) REGISTER FIELD REGISTER BITS DEFAULT R/RW DESCRIPTION NAME ADDRESS CDR State Machine Reg 0x3E Channel 0x80 CDR State Machine Setting Control At power-up, this bit needs to be set to 0'b. 7 INIT_CDR_SM_3 1 RW See initialization set up 6 Reserved 0 RW 5 Reserved 0 RW 4 Reserved 0 RW 3 Reserved 0 RW 2 Reserved 0 RW 1 Reserved 0 RW 0 Reserved 0 RW HEO_VEO_Lock Reg 0x69 Channel 0x0A HEO/VEO Interval Monitoring 7 Reserved 0 RW 6 Reserved 0 RW 5 Reserved 0 RW 4 Reserved 0 RW 3 hv_lckmon_cnt_ms[3] 1 RW While monitoring lock, this sets the interval 2 hv_lckmon_cnt_ms[2] 0 RW time. Each interval is 6.5 ms. At default condition, HEO_VEO Lock Monitor occurs 1 hv_lckmon_cnt_ms[1] 1 RW once every 65 ms. 0 hv_lckmon_cnt_ms[0] 0 RW CDR State Machine Reg 0x6A Channel 0x44 CDR State Machine Control Control 7 INIT_CDR_SM_57 0 RW 6 INIT_CDR_SM_56 1 RW 5 INIT_CDR_SM_55 0 RW 4 INIT_CDR_SM_54 0 RW At power-up, this register should be set to 0x00. See initialization set up 3 INIT_CDR_SM_53 0 RW 2 INIT_CDR_SM_52 1 RW 1 INIT_CDR_SM_51 0 RW 0 INIT_CDR_SM_50 0 RW SMPTE_Rate_Enable Reg 0xA0 Channel 0x1f SMPTE_Data_Rate_Lock_Restriction 7 Reserved 0 RW 6 Reserved 0 RW 5 Reserved 0 RW 1: Enable CDR Lock to 270 Mbps 4 dvb_enable 1 RW 0: Disable CDR Lock to 270 Mbps 1: Enable CDR Lock to 1.485/1.4835 Gbps 3 hd_enable 1 RW 0: Disable CDR Lock to 1.485/1.4835 Gbps 1: Enable CDR Lock to 2.97/2.967 Gbps 2 3G_enable 1 RW 0: Disable CDR Lock to 2.97/2.967 Gbps 1 Reserved 1 RW Reserved 0 Reserved 1 RW Reserved Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 39 Product Folder Links: LMH0318 |
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