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LP5562TMX/NOPB Datasheet(PDF) 23 Page - Texas Instruments |
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LP5562TMX/NOPB Datasheet(HTML) 23 Page - Texas Instruments |
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23 / 52 page ![]() Input Buffer Level Shifter Level Shifter SDA SCL VDD EN Level Shifter ADDR_SEL0 Level Shifter ADDR_SEL1 Level Shifter CLK_32K SVA-30197409 23 LP5562 www.ti.com SNVS820B – APRIL 2013 – REVISED DECEMBER 2016 Product Folder Links: LP5562 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated Figure 18. Using EN Pin as Digital I/O Voltage Reference 7.3.9 ADDR_SEL0, ADDR_SEL1 Pins The ADDR_SEL0 and ADDR_SEL1 pins define the device I2C address. Pins are referenced to EN pin signal level. See I2C Addresses for I2C address definitions. 7.3.10 CLK_32 Pin The CLK_32K pin is used for connecting an external 32-kHz clock to LP5562. An external clock can be used to synchronize the sequence engines of several LP5562 devices. Using an external clock can also improve automatic power save mode efficiency, because an internal clock can be switched off automatically when device has entered power-save mode, and an external clock is present. Device can be used without the external clock. If external clock is not used on the application, the CLK_32K pin should be connected to GND to prevent floating of this pin and extra current consumption. 7.4 Device Functional Modes RESET: In the reset mode all the internal registers are reset to the default values. Reset is done always if FFh is written to Reset Register (0Dh) or internal Power On Reset is activated. Power On Reset (POR) will activate when supply voltage is connected or when the supply voltage VDD falls below 1.5 V (typical). Once VDD rises above 1.9 V (typical), POR will inactivate and the chip will continue to the standby mode. CHIP_EN control bit is low after POR by default. STANDBY: The standby mode is entered if the register bit CHIP_EN or EN pin is low and Reset is not active. This is the low power consumption mode, when all circuit functions are disabled. Registers can be written in this mode if EN pin is high. Control bits are effective after start up. START-UP: When CHIP_EN bit is written high and EN pin is high, the internal startup sequence powers up all the needed internal blocks (VREF, Bias, Oscillator etc.). Start-up delay after setting EN pin high is 1 ms (typical). Start-up delay after setting chip_en bit to '1' is 500 μs (typical). If the device temperature rises too high, the Thermal Shutdown (TSD) disables the device operation and the device state is in start-up mode, until no thermal shutdown event is present. NORMAL: During normal mode the user controls the device using the Control Registers. If EN pin is set low, the CHIP_EN bit is reset to 0. |
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