VCC(drop)

VCC

3 V

t pw

0

0.5

1

1.5

2

0.001

1

1000

Typical Conditions

1 ns

1 ns

tpw − Pulse Width − µs

tpw − Pulse Width − µs

VCC = 3 V

0

1

t d(BOR)

VCC

V(B_IT−)

Vhys(B_IT−)

VCC(start)

MSP430G2231-Q1

www.ti.com

SLAS787B – NOVEMBER 2011 – REVISED MARCH 2014

9.12 POR, BOR

(1) (2)

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER

TEST CONDITIONS

VCC

MIN

TYP

MAX

UNIT

VCC(start)

See Figure 11

dVCC/dt ≤ 3 V/s

0.7 × V(B_IT–)

V

V(B_IT–)

See Figure 11 through Figure 13

dVCC/dt ≤ 3 V/s

1.35

V

Vhys(B_IT–)

See Figure 11

dVCC/dt ≤ 3 V/s

130

mV

td(BOR)

See Figure 11

2000

µs

Pulse duration needed at RST/NMI pin to

t(reset)

2.2 V, 3 V

2

µs

accepted reset internally

(1)

The current consumption of the brownout module is already included in the ICC current consumption data. The voltage level V(B_IT–) +

Vhys(B_IT–)is ≤ 1.8 V.

(2)

During power up, the CPU begins code execution following a period of td(BOR) after VCC = V(B_IT–) + Vhys(B_IT–). The default DCO settings

must not be changed until VCC ≥ VCC(min), where VCC(min) is the minimum supply voltage for the desired operating frequency.

Figure 11. POR and BOR vs Supply Voltage

Figure 12. VCC(drop) Level With a Square Voltage Drop to Generate a POR or BOR Signal

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